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STM32F401CDU6 Datenblatt(PDF) 93 Page - STMicroelectronics |
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STM32F401CDU6 Datenblatt(HTML) 93 Page - STMicroelectronics |
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93 / 135 page ![]() Electrical characteristics STM32F401xB STM32F401xC 93/135 DocID024738 Rev 6 01 fmax(IO)out Maximum frequency(3) CL = 50 pF, VDD ≥ 2.70 V - - 25 MHz CL = 50 pF, VDD ≥ 1.7 V - - 12.5 CL = 10 pF, VDD ≥ 2.70 V - - 50 CL = 10 pF, VDD ≥ 1.7 V - - 20 tf(IO)out/ tr(IO)out Output high to low level fall time and output low to high level rise time CL = 50 pF, VDD ≥2.7 V - - 10 ns CL = 50 pF, VDD ≥ 1.7 V - - 20 CL = 10 pF, VDD ≥ 2.70 V - - 6 CL = 10 pF, VDD ≥ 1.7 V - - 10 10 fmax(IO)out Maximum frequency(3) CL = 40 pF, VDD ≥ 2.70 V - - 50(4) MHz CL = 40 pF, VDD ≥ 1.7 V - - 25 CL = 10 pF, VDD ≥ 2.70 V - - 100(4) CL = 10 pF, VDD ≥ 1.7 V - - 50(4) tf(IO)out/ tr(IO)out Output high to low level fall time and output low to high level rise time CL = 40 pF, VDD≥ 2.70 V - - 6 ns CL = 40 pF, VDD≥ 1.7 V - - 10 CL = 10 pF, VDD≥ 2.70 V - - 4 CL = 10 pF, VDD≥ 1.7 V - - 6 11 Fmax(IO)out Maximum frequency(3) CL = 30 pF, VDD ≥ 2.70 V - - 100(4) MHz CL = 30 pF, VDD ≥ 1.7 V - - 50(4) CL = 10 pF, VDD ≥ 2.70 V - - 180(4) CL = 10 pF, VDD≥ 1.7 V - - 100(4) tf(IO)out/ tr(IO)out Output high to low level fall time and output low to high level rise time CL = 30 pF, VDD ≥ 2.70 V - - 4 ns CL = 30 pF, VDD ≥ 1.7 V - - 6 CL = 10 pF, VDD≥ 2.70 V - - 2.5 CL = 10 pF, VDD≥ 1.7 V - - 4 -tEXTIpw Pulse width of external signals detected by the EXTI controller 10 - - ns 1. Guaranteed by characterization. 2. The I/O speed is configured using the OSPEEDRy[1:0] bits. Refer to the STM32F4xx reference manual for a description of the GPIOx_SPEEDR GPIO port output speed register. 3. The maximum frequency is defined in Figure 31. 4. For maximum frequencies above 50 MHz and VDD > 2.4 V, the compensation cell should be used. Table 56. I/O AC characteristics(1)(2) (continued) OSPEEDRy [1:0] bit value(1) Symbol Parameter Conditions Min Typ Max Unit |
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