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LAN8742Ai-CZ Datenblatt(PDF) 13 Page - Microchip Technology |
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LAN8742Ai-CZ Datenblatt(HTML) 13 Page - Microchip Technology |
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13 / 124 page ![]() 2013-2015 Microchip Technology Inc. DS00001989A-page 13 LAN8742A/LAN8742Ai TABLE 2-7: POWER PINS Num Pins Name Symbol Buffer Type Description 1 +1.8 V to +3.3 V Variable I/O Power VDDIO P +1.8 V to +3.3 V variable I/O power. Refer to the LAN8742A/LAN8742Ai reference schematic for connection information. 1 +1.2 V Digital Core Power Supply VDDCR P Supplied by the on-chip regulator unless config- ured for regulator off mode via the REGOFF con- figuration strap. Refer to the LAN8742A/LAN8742Ai reference schematic for connection information. Note: 1 µF and 470 pF decoupling capaci- tors in parallel to ground should be used on this pin. 1 +3.3 V Channel 1 Analog Port Power VDD1A P +3.3 V Analog Port Power to Channel 1. Refer to the LAN8742A/LAN8742Ai reference schematic for connection information. 1 +3.3 V Channel 2 Analog Port Power VDD2A P +3.3 V Analog Port Power to Channel 2 and the internal regulator. Refer to the LAN8742A/LAN8742Ai reference schematic for connection information. 1 Ground VSS P Common ground. This exposed pad must be con- nected to the ground plane with a via array. |
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