2003 Jul 14

4

Philips Semiconductors

Product specification

Quad 2-input NOR gate

74ALVC02

handbook, halfpage

114

1Y

VCC

7

2

3

4

5

6

1A

1B

2Y

2A

2B

13

12

11

10

9

4Y

4B

4A

3Y

3B

8

GND

Top view

3A

MNA951

Fig.2 Pin configuration DHVQFN14.

(1) (1) The die substrate is attached to this pad using conductive die

attach material. It can not be used as a supply pin or input.

handbook, halfpage

MNA215

A

B

Y

Fig.3 Logic diagram (one gate).

handbook, halfpage

MNA216

1A

1B

1Y

3

2

1

2A

2B

2Y

6

5

4

3A

3B

3Y

9

8

10

4A

4B

4Y

12

11

13

Fig.4 Function diagram.

handbook, halfpage

MNA217

1

3

2

4

6

5

10

9

8

13

12

11

Fig.5 IEC logic symbol.