WM8281ECSSLASHR datasheet(308/392 Pages) CIRRUS

308 / 392 page

WM8281

308

Rev 4.0

BLOCK DIAGRAM AND CONTROL REGISTERS

The Charge Pump and Regulator circuits are illustrated in Figure 82. Note that decoupling capacitors

and flyback capa

citors are required for these circuits. Refer to the “Applications Information” section

for recommended external components.

Analogue output

supply

CPVDD

CPGND

AGND

LDO 1

LDOVDD

LDOENA

Digital Core supply

LDOVOUT

DGND

Analogue reference

LDO1_ENA

LDO1_VSEL[5:0]

LDO1_DISCH

LDO1ENA_PD

LDO1ENA_PU

MICBIAS2

MICBIAS1

MICB1_ENA

MICB1_BYPASS

MICB1_LVL[3:0]

MICB1_RATE

MICB1_DISCH

MICB1_EXT_CAP

MICB2_ENA

MICB2_BYPASS

MICB2_LVL[3:0]

MICB2_RATE

MICB2_DISCH

MICB2_EXT_CAP

MICBIAS3

MICB3_ENA

MICB3_BYPASS

MICB3_LVL[3:0]

MICB3_RATE

MICB3_DISCH

MICB3_EXT_CAP

DCVDD

LDO2_VSEL[5:0]

LDO2_DISCH

CP2CA

CP2VOUT

CP2CB

Charge Pump 1

CP2_ENA

CP2_BYPASS

CP2_DISCH

LDO1 may be used to generate the DCVDD supply. In this

case, the LDOVOUT pin must be connected to the DCVDD pin.

Analogue input

supply

Voltage

Reference

AVDD

Analogue supply

MICVDD

Charge

Pump 2

LDO2

Figure 82 Charge Pumps and Regulators

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R512

(0200h)

Mic

Charge

Pump 1

CP2_DISCH

Charge Pump 2 Discharge

0 = CP2VOUT floating when disabled

1 = CP2VOUT discharged when disabled

CP2_BYPASS

Charge Pump 2 and LDO2 Bypass Mode

0 = Normal

1 = Bypass mode

In Bypass mode, CPVDD is connected

directly to MICVDD.

Note that CP2_ENA must also be set.

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