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WM8281ECS/R Datenblatt(PDF) 321 Page - Cirrus Logic

Teilenummer WM8281ECS/R
Bauteilbeschribung  Low Power Audio System with Ambient Noise Cancellation and Echo Cancellation
PDF  392 Pages
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Hersteller  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8281ECS/R Datenblatt(HTML) 321 Page - Cirrus Logic

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WM8281
Rev 4.0
321
REG
NAME
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DEFAULT
R152 (98h) Haptics Status
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ONES
HOT_
STS
0000h
R256 (100h) Clock 32k 1
0
0
0
0
0
0
0
0
0
CLK_3
2K_EN
A
0
0
0
0
CLK_32K_SRC
[1:0]
0002h
R257 (101h) System Clock 1
SYSCL
K_FRA
C
0
0
0
0
SYSCLK_FREQ [2:0]
0
SYSCL
K_ENA
0
0
SYSCLK_SRC [3:0]
0504h
R258 (102h) Sample rate 1
0
0
0
0
0
0
0
0
0
0
0
SAMPLE_RATE_1 [4:0]
0011h
R259 (103h) Sample rate 2
0
0
0
0
0
0
0
0
0
0
0
SAMPLE_RATE_2 [4:0]
0011h
R260 (104h) Sample rate 3
0
0
0
0
0
0
0
0
0
0
0
SAMPLE_RATE_3 [4:0]
0011h
R266 (10Ah) Sample rate 1
status
0
0
0
0
0
0
0
0
0
0
0
SAMPLE_RATE_1_STS [4:0]
0000h
R267 (10Bh) Sample rate 2
status
0
0
0
0
0
0
0
0
0
0
0
SAMPLE_RATE_2_STS [4:0]
0000h
R268 (10Ch) Sample rate 3
status
0
0
0
0
0
0
0
0
0
0
0
SAMPLE_RATE_3_STS [4:0]
0000h
R274 (112h) Async clock 1
0
0
0
0
0
ASYNC_CLK_FREQ
[2:0]
0
ASYN
C_CLK
_ENA
0
0
ASYNC_CLK_SRC [3:0]
0305h
R275 (113h) Async sample rate
1
0
0
0
0
0
0
0
0
0
0
0
ASYNC_SAMPLE_RATE_1 [4:0]
0011h
R276 (114h) Async sample rate
2
0
0
0
0
0
0
0
0
0
0
0
ASYNC_SAMPLE_RATE_2 [4:0]
0011h
R283 (11Bh) Async sample rate
1 status
0
0
0
0
0
0
0
0
0
0
0
ASYNC_SAMPLE_RATE_1_STS [4:0]
0000h
R284 (11Ch) Async sample rate
2 status
0
0
0
0
0
0
0
0
0
0
0
ASYNC_SAMPLE_RATE_2_STS [4:0]
0000h
R329 (149h) Output system
clock
OPCL
K_ENA
0
0
0
0
0
0
0
OPCLK_DIV [4:0]
OPCLK_SEL [2:0]
0000h
R330 (14Ah) Output async
clock
OPCL
K_ASY
NC_E
NA
0
0
0
0
0
0
0
OPCLK_ASYNC_DIV [4:0]
OPCLK_ASYNC_SEL
[2:0]
0000h
R338 (152h) Rate Estimator 1
0
0
0
0
0
0
0
0
0
0
0
TRIG_
ON_S
TART
UP
LRCLK_SRC [2:0]
RATE_
EST_E
NA
0000h
R339 (153h) Rate Estimator 2
0
0
0
0
0
0
0
0
0
0
0
SAMPLE_RATE_DETECT_A [4:0]
0000h
R340 (154h) Rate Estimator 3
0
0
0
0
0
0
0
0
0
0
0
SAMPLE_RATE_DETECT_B [4:0]
0000h
R341 (155h) Rate Estimator 4
0
0
0
0
0
0
0
0
0
0
0
SAMPLE_RATE_DETECT_C [4:0]
0000h
R342 (156h) Rate Estimator 5
0
0
0
0
0
0
0
0
0
0
0
SAMPLE_RATE_DETECT_D [4:0]
0000h
R369 (171h) FLL1 Control 1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FLL1_
FREE
RUN
FLL1_
ENA
0002h
R370 (172h) FLL1 Control 2
FLL1_
CTRL_
UPD
0
0
0
0
0
FLL1_N [9:0]
0008h
R371 (173h) FLL1 Control 3
FLL1_THETA [15:0]
0018h
R372 (174h) FLL1 Control 4
FLL1_LAMBDA [15:0]
007Dh
R373 (175h) FLL1 Control 5
0
0
0
0
FLL1_FRATIO [3:0]
0
0
0
0
FLL1_OUTDIV [2:0]
0
0006h
R374 (176h) FLL1 Control 6
0
0
0
0
0
0
0
0
FLL1_REFCLK
_DIV [1:0]
0
0
FLL1_REFCLK_SRC [3:0]
0000h



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