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ADL5567ACPZN-R7 Datenblatt(PDF) 20 Page - Analog Devices

Teilenummer ADL5567ACPZN-R7
Bauteilbeschribung  4.3 GHz, Ultrahigh Dynamic Range, Dual Differential Amplifier
PDF  24 Pages
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Hersteller  AD [Analog Devices]
Direct Link  http://www.analog.com
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ADL5567ACPZN-R7 Datenblatt(HTML) 20 Page - Analog Devices

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Data Sheet
ADL5567
Rev. 0 | Page 19 of 23
Table 6. Example RC Values for Various Bandwidth Limits
Component
Value/Device
Description/Comments
Amplifier
½ ADL5567
One channel
RSERIES
10 Ω
Small value to minimize loss
Wideband Configuration
BW
3 GHz
Wide BW allows undersampling operation
CFILTER (See Figure 51)
1 pF
Final value depends on PCB parasitics
Nyquist Band Configuration
BW
1.8 GHz
Filters noise and harmonics above Nyquist frequency
CFILTER (See Figure 51)
2.2 pF
Final value depends on PCB parasitics
ADC
AD9625
2.6 GSPS, 12-bit ADC
AVDD –2V
PAD
ADL5567
MINI-CIRCUITS
Bias-TEE
ZFBT-4R2GW
DC OFFSET:
550mV
AVDD –2V
AVDD 3.3V
AVDD
DRVDD
20Ω
10kΩ
VCOM
VIP
PM
VIN
AVDD
3.3V
AVDD
M2V
10kΩ
95Ω
100Ω
0.75pF
ADC
INTERNAL
INPUT Z
AD9625
VCM
51Ω
10Ω
10Ω
20Ω
20Ω
0.1µF
CFILTER
1pF
CFILTER
1pF
ANALOG
INPUT
INPUT
Z = 50Ω
1µF
Figure 51. Wideband ADC Interfacing Example: ADL5567 Driving the AD9625
50Ω
ANALYZER
84.5Ω
84.5Ω
ETC1-1
0.1µF
0.1µF
34.8Ω
34.8Ω
VIN1
VIP1
AC
50Ω
0.1µF
0.1µF
ETC1-1
VS
5nH
0.1µF
ADL5567
AMPLIFIER 1
50Ω
50Ω
Figure 52. General-Purpose Characterization Circuit
SOLDERING INFORMATION AND RECOMMENDED
LAND PATTERN
Figure 53 shows the recommended land pattern for the ADL5567.
The ADL5567 is contained in a 4 mm × 4 mm LFCSP package,
which has an exposed ground pad (EP). This pad is internally
connected to the ground of the chip. To minimize thermal
impedance and ensure electrical performance, solder the pad to
the low impedance ground plane on the PCB. To further reduce
thermal impedance, it is recommended that the ground planes
on all layers under the paddle be stitched together with vias.
For more information on land pattern design and layout, refer
to the AN-772 Application Note, A Design and Manufacturing
Guide for the Lead Frame Chip Scale Package (LFCSP).
The land pattern on the ADL5567 evaluation board provides a
simulated thermal resistance (θJA) of 56 °C/W.
13 MILS
39 MILS
12 MILS
91 MILS
13.7 MILS
19.7 MILS
Figure 53. Recommended Land Pattern



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