AS1313 datasheet(15/26 Pages) AMSCO

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[v1-43] 2015-Jul-23

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AS1313 − Detailed Description

Capacitors

The AS1313 requires 3 capacitors. Recommended ceramic X5R

or X7R types will minimize ESL and ESR while maintaining

capacitance at rated voltage over temperature.

The input capacitor supports the triangular current during the

on-time of SW1 and maintains a broadly constant input voltage

during this time. The capacitance value is obtained from

choosing a ripple voltage during the on-time of SW1.

Using tON = 1μs, ICOIL = 400mA and VRIPPLE = 50mV, EQ5 yields:

CIN = 8μF.

Because ceramic capacitors lose a lot of their initial capacitance

at their maximum rated voltage, it is recommended that either

a higher input capacity or a capacitance with a higher rated

voltage is used. A 22

μF cap for CIN is recommended.

Additionally, ripple voltage is generated by the equivalent

series resistance (ESR) of the capacitor.

The output capacitor supports the triangular current during the

off-time SW1 (coil discharge period), and also the load current

during the wait time (Region C) and the idle time (Region D).

Using tWAIT = 100μs, tIDLE = 500μs, IOUT = 1mA and

VOUT_nom = 3.3V, EQ7 yields:

COUT = 9μF.

Due to the DC bias of the cap and to sustain also load steps, the

COUT should be between 22μF and 47μF. A larger output

capacitor should be used if lower peak to peak output voltage

ripple is desired. A larger output capacitor will also improve

load regulation on VOUT.

(EQ5)

CIN

ICOIL

VRIPPLE

--------------------- t

⋅

(EQ6)

VRIPPLE ESR

–

ICOIL RESR

⋅

(EQ7)

COUT

IOUT

0.02 VOUT nom

–

⋅

-------------------------------------------

tWAIT tIDLE

()

⋅

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