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AD9364BBCZ Datenblatt(PDF) 6 Page - Analog Devices

Teilenummer AD9364BBCZ
Bauteilbeschribung  Point to point communication systems
PDF  33 Pages
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Hersteller  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9364BBCZ Datenblatt(HTML) 6 Page - Analog Devices

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Data Sheet
AD9364
Parameter1
Symbol Min
Typ
Max
Unit
Test Conditions/Comments
Output Voltage
Minimum
0.5
V
Maximum
VDD_GPO − 0.3
V
Output Current
10
mA
DIGITAL SPECIFICATIONS (CMOS)
Logic Inputs
Input Voltage
High
VDD_INTERFACE × 0.8
VDD_INTERFACE
V
Low
0
VDD_INTERFACE × 0.2
V
Input Current
High
−10
+10
μA
Low
−10
+10
μA
Logic Outputs
Output Voltage
High
VDD_INTERFACE × 0.8
V
Low
VDD_INTERFACE × 0.2
V
DIGITAL SPECIFICATIONS (LVDS)
Logic Inputs
Input Voltage Range
825
1575
mV
Each differential input in the
pair
Input Differential Voltage
Threshold
−100
+100
mV
Receiver Differential Input
Impedance
100
Ω
Logic Outputs
Output Voltage
High
1375
mV
Low
1025
mV
Output Differential Voltage
150
mV
Programmable in 75 mV
steps
Output Offset Voltage
1200
mV
GENERAL-PURPOSE OUTPUTS
Output Voltage
High
VDD_GPO × 0.8
V
Low
VDD_GPO × 0.2
V
Output Current
10
mA
SPI TIMING
VDD_INTERFACE = 1.8 V
SPI_CLK
Period
tCP
20
ns
Pulse Width
tMP
9
ns
SPI_ENB Setup to First SPI_CLK
Rising Edge
tSC
1
ns
Last SPI_CLK Falling Edge to
SPI_ENB Hold
tHC
0
ns
SPI_DI
Data Input Setup to
SPI_CLK
tS
2
ns
Data Input Hold to SPI_CLK
tH
1
ns
SPI_CLK Rising Edge to Output
Data Delay
4-Wire Mode
tCO
3
8
ns
3-Wire Mode
tCO
3
8
ns
Bus Turnaround Time, Read
tHZM
tH
tCO(max)
ns
After baseband processor
(BBP) drives the last address
bit
Bus Turnaround Time, Read
tHZS
0
tCO(max)
ns
After the AD9364 drives the
last data bit
Rev. C | Page 5 of 32



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