LM79 datasheet(17/31 Pages) NSC

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Functional Description (Continued)

A typical application, such as is shown in

Figure 8, might

select the input voltage divider to provide 3V at the analog

inputs of the LM79. This is sufficiently high for good resolu-

tion of the voltage, yet leaves headroom for upward excur-

sions from the supply of about 25%. To simplify the process

of resistor selection, set the value of R2 first. Select a value

for R2 between 10 k

Ω and 100 kΩ. This is low enough to

avoid errors due to input leakage currents yet high enough to

both protect the inputs under overdrive conditions as well as

minimize loading of the source. Then select R1 to provide a

3V input according to:

The negative inputs provide inverting op amps with

non-inverting inputs connected to ground. The output of

these op amps are designed to only drive the input of the

LM78 and their associated feedback loops. Avoid heavy

loading, long lines, and capacitive loading with these op

amps. Additional loading may cause oscillations and thus

erroneous readings. The optimum feedback resistor (resistor

from Feedback to -IN pin) value is approximately 60 k

Ω,

based on the op amp nominal output current rating of 50 µA

at an output voltage of 3V. Locate the feedback resistors as

close as possible to the LM79. The recommended range for

IN is from 30 kΩ to 300 kΩ.

Select R

IN according to:

The analog inputs have internal diodes that clamp inputs

exceeding the power supply and ground. Exceeding any

analog input has no detrimental effect on other channels.

The input diodes will also clamp voltages appearing at the

inputs of an un-powered LM79. External resistors should be

included to limit input currents to the values given in the

ABSOLUTE MAXIMUM RATINGS for Input Current At Any

Pin. Inputs with the attenuator networks will usually meet

these requirements. If it is possible for inputs without attenu-

ators (such as the 2.5V or 3.3V supplies) to be turned on

while LM79 is powered off, additional resistors of about 10

Ω should be added in series with the inputs to limit the input

current.

5.0 LAYOUT AND GROUNDING

Analog inputs will provide best accuracy when referred to the

AGND pin. A separate, low-impedance ground plane for

analog ground, which provides a ground point for the voltage

dividers and analog components, will provide best perfor-

mance but is not mandatory. Analog components such as

voltage dividers and feedback resistors should be located

physically as close as possible to the LM79.

The power supply bypass, the parallel combination of 10 µF

(electrolytic or tantalum) and 0.1 µF (ceramic) bypass ca-

pacitors connected between pin 12 and ground, should also

be located as close as possible to the LM79.

6.0 FAN INPUTS

Inputs are provided for signals from fans equipped with

tachometer outputs. These are logic-level inputs with an

approximate threshold of 1.4V. Signal conditioning in the

LM79 accommodates the slow rise and fall times typical of

fan tachometer outputs. The maximum input signal range is

0toV

CC. In the event these inputs are supplied from fan

outputs which exceed 0 to V

CC, either resistive division or

diode clamping must be included to keep inputs within an

acceptable range, as shown in

Figure 9. R2 is selected so

that it does not develop excessive voltage due to input

leakage. R1 is selected based on R2 to provide a minimum

input of 2V and a maximum of V

CC. R1 should be as low as

possible to provide the maximum possible input up to V

CC for

best noise immunity. Alternatively, use a shunt reference or

zener diode to clamp the input level.

If fans can be powered while the power to the LM79 is off,

the LM79 inputs will provide diode clamping. Limit input

current to the Input Current at Any Pin specification shown in

the ABSOLUTE MAXIMUM RATINGS section. In most

cases, open collector outputs with pull-up resistors inher-

ently limit this current. If this maximum current could be

exceeded, either a larger pull up resistor should be used or

resistors connected in series with the fan inputs.

The Fan Inputs gate an internal 22.5 kHz oscillator for one

period of the Fan signal into an 8-bit counter (maximum

count = 255). The default divisor, located in the VID/Fan

Divisor Register, is set to 2 (choices are 1, 2, 4, and 8)

providing a nominal count of 153 for a 4400 rpm fan with two

pulses per revolution. Typical practice is to consider 70% of

normal RPM a fan failure, at which point the count will be

219.

Determine the fan count according to:

Note that Fan 1 and Fan 2 Divisors are programmable via

the VID/Fan Divisor Register. Fan 3 is not adjustable, and its

Divisor is always set to 2.

Fans that provide only one pulse per revolution would re-

quire a divisor set twice as high as fans that provide two

pulses, thus maintaining a nominal fan count of 153. There-

fore, the divisor should be set to 4 for a fan that provides 1

pulse per revolution with a nominal RPM of 4400.

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