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LM80 Datenblatt(PDF) 25 Page - National Semiconductor (TI) |
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LM80 Datenblatt(HTML) 25 Page - National Semiconductor (TI) |
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25 / 29 page ![]() Functional Description (Continued) 12.7 Interrupt Mask Register 2 — Address 44h Power on default <7:0> = 0000 0000 binary Bit Name Read/ Write Description 0 Hot Temperature Read/Write A one disables the corresponding interrupt status bit for INT interrupt. 1 BTI Read/Write A one disables the corresponding interrupt status bit for INT interrupt. 2 FAN1 Read/Write A one disables the corresponding interrupt status bit for INT interrupt. 3 FAN2 Read/Write A one disables the corresponding interrupt status bit for INT interrupt. 4 CI (Chassis Intrusion) Read/Write A one disables the corresponding interrupt status bit for INT interrupt. 5 OS bit Read/Write A one disables the corresponding interrupt status bit for INT interrupt. 6 Hot Temperature Interrupt mode select Read/Write A zero selects the default interrupt mode which gives the user an interrupt if the tem- perature goes above the hot limit. The interrupt will be cleared once the status register is read, but it will again be generated when the next conversion has completed. It will continue to do so until the temperature goes below the hysteresis limit. A one selects the one time interrupt mode which only gives the user one interrupt when it goes above the hot limit. The interrupt will be cleared once the status register is read. Another interrupt will not be generated until the temperature goes below the hysteresis limit. It will also be cleared if the status register is read. No more interrupts will be gen- erated until the temperature goes above the hot limit again. The corresponding bit will be cleared in the status register every time it is read but may not set again when the next conversion is done. (See in Section 7.0) 7 OS bit Interrupt mode select Read/Write A zero selects the default interrupt mode which gives the user an interrupt if the tem- perature goes above the hot limit. The interrupt will be cleared once the status register is read, but it will again be generated when the next conversion has completed. It will continue to do so until the temperature goes below the hysteresis limit. A one selects the one time interrupt mode which only gives the user one interrupt when it goes above the hot limit. The interrupt will be cleared once the status register is read. Another interrupt will not be generated until the temperature goes below the hysteresis limit. It will also be cleared if the status register is read. No more interrupts will be gen- erated until the temperature goes above the hot limit again. The corresponding bit will be cleared in the status register every time it is read but may not set again when the next conversion is done. (See Section in Section 7.0) www.national.com 25 |
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