LM87 datasheet(24/32 Pages) NSC

24 / 32 page

Functional Description (Continued)

13.0 REGISTERS AND RAM

13.1 Address Pointer Register

The main register is the Address Pointer Register. The bit

designations are as follows:

Bit

Name

Read/Write

Description

7-0

Address Pointer

Write

Address of RAM and Registers. See the tables below for detail.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Address Pointer (Power On default 00h)

13.2 Address Pointer Index (A7–A0)

Registers and RAM

A6–A0 in

Hex

Power On Value of

Registers:

Notes

<7:0> in Binary

Internal Temp. Hardware

High Limit

13h

0100 0110

70 ˚C Default - <7:0> =0100 0110 - User

adjustable. Lockable by setting bit 1 of

External Temp. Hardware

High Limit

14h

0101 0101

85 ˚C Default - <7:0> =0101 0101 - User

adjustable. Lockable by setting bit 2 of

Test Register

15h

0000 0000

Always set to 00h

Channel Mode Register

16h

0000 0000

Internal Temp. Hardware

High Limit

17h

0100 0110

70 ˚C Default - <7:0> =0100 0110 - User

adjustable

External Temp. Hardware

High Limit

18h

0101 0101

85 ˚C Default - <7:0> =0101 0101 - User

adjustable

Value RAM

19h–3Dh

See Section 13.18 for details. Address 19h

default=1111 1111

Company ID

3Eh

0000 0010

This designates the National Semiconductor

LM87.

Revision

3Fh

0000 0110

Revisions of this device will start with 1 and

increment by one.

Configuration Register 1

40h

0000 1000

Interrupt Status Register 1

41h

0000 0000

Interrupt Status Register 2

42h

0000 0000

Interrupt Mask Register 1

43h

0000 0000

Interrupt Mask Register 2

44h

0000 0000

CI Clear Register

46h

0000 0000

VID0-3/Fan Divisor

47h

<7:4> = 0101;

<3:0> = VID3–VID0

VID4 Register

49h

<7:1> =1000 000;

<0>=VID4

Configuration Register 2

4Ah

0000 0000

Interrupt Status Register 1

Mirror

4Ch

0000 0000

Interrupt Status Register 2

Mirror

4Dh

0000 0000

SMBALERT# Enable

80h

0010 0000

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