LMD18400 datasheet(10/18 Pages) NSC

10 / 18 page

Applications Information (Continued)

DIAGNOSTICS

The LMD18400 has extensive circuit diagnostic information

reporting capability Use of this information can produce

systems with intelligent feedback of switch status as well as

load fault conditions for troubelshooting purposes All of the

diagnostic information is contained in an 11-bit word This

data can be clocked out of the LMD18400 in a serial fashion

as shown in

Figure 8 The shift register is parallel loaded

with the diagnostic data whenever the Chip Select Input is

at a Logic 1 and changes to the serial shift mode when Chip

Select is taken to a Logic 0 The Data Output line (pin 8) is

biased internally from a 51V regulator which sets the Logic

1 output voltage This pin has low current sourcing capability

so any load on this pin will reduce the Logic 1 output level

which is guaranteed to be at least 24V with a 360 mA load

The data interface is MICROWIRE compatible in that data is

clocked out of the LMD18400 on the falling edge of the

clock to be clocked into the controlling microprocessor on

the rising edge Any number of devices can share a com-

mon data output line because the data output pin is held in a

high impedance (TRI-STATE) condition until the device is

selected by taking its Chip Select Input low Following Chip

Select going low there is a short data setup time interval

(500 ns Min) required This is necessary to allow the first

data bit of information to be established on the data output

line prior to the first rising clock edge which will input the

data bit into the controller When all 11 bits of diagnostic

data have been shifted out the data output goes to a Logic 1

level until the Chip Select line is returned high

Figure 8 also indicates the significance of the diagnostic

data bits The first 4 bits indicate an output load error condi-

tion one for each channel in succession (see Load Error

Detection)

Bits 5 through 8 provide a readback of the commanded

ONOFF status of each switch

A unique feature of the LMD18400 is that it provides an

early warning of excessive operating temperature Should

the die temperature exceed a145 C bit 9 will be set to a

Logic 0 Acting on this information a system can be pro-

grammed to take corrective action shutting OFF specific

loads perhaps while the LMD18400 is still operating nor-

mally (not yet in thermal shutdown) If this early warning is

ignored and the device continues to rise in temperature the

thermal shutdown circuitry will come into action at a die tem-

perature of a170 C Should this occur bit 10 of the diag-

nostic data stream will be set to a Logic 0 indicating that the

device is in thermal shutdown and all of the outputs have

been shut OFF

The final data bit bit 11 indicates an overvoltage condition

on the VCC supply (VCC is greater than 35V) and again indi-

cates that all of the drivers are OFF

The diagnostic data can be read periodically by a controller

or only in the event of a general system error indication to

determine the cause of any system problem This general

indication of a fault is provided by an Error Flag output (pin

13) This pin goes low whenever any type of error is detect-

ed There is a built-in delay of approximately 75 ms from the

time an error is detected until pin 13 is taken low This is to

help mask short duration error conditions such as may be

caused by driving highly capacitive loads (l2 mF) A lamp

load may generate a shorted load error for several hundred

milliseconds as it turns on which should be ignored

TLH11026 – 17

FIGURE 8 Serial Diagnostic Data Assignments

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