LSM330 datasheet(62/75 Pages) STMICROELECTRONICS

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LSM330

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DocID023426 Rev 3

8.59

CTRL_REG3_G (22h)

Angular rate sensor control register 3 (r/w).

Table 107. High-pass filter cutoff frequency configuration [Hz](1)

1. Values in the table are indicative and can vary proportionally with the specific ODR value.

HPCF[3:0]

ODR=95 Hz

ODR=190 Hz

ODR=380 Hz

ODR=760 Hz

0000

7.2

13.5

51.4

0001

3.5

7.2

13.5

0010

1.8

3.5

7.2

13.5

0011

0.9

1.8

3.5

7.2

0100

0.45

0.9

1.8

3.5

0101

0.18

0.45

0.9

1.8

0110

0.09

0.18

0.45

0.9

0111

0.045

0.09

0.18

0.45

1000

0.018

0.045

0.09

0.18

1001

0.009

0.018

0.045

0.09

Table 108. CTRL_REG3_G register

I1_Int1

I1_Boot

H_Lactive

PP_OD

I2_DRDY

I2_WTM

I2_ORun

I2_Empty

Table 109. CTRL_REG3_G description

I1_Int1

Interrupt enable on INT1_G pin. Default value: 0. (0: Disable; 1: Enable)

I1_Boot

Boot status available on INT1_G. Default value: 0. (0: Disable; 1: Enable)

H_Lactive

Interrupt active configuration on INT1_G. Default value: 0. (0: High; 1: Low)

PP_OD

Push-pull / Open drain. Default value: 0. (0: Push-pull; 1: Open drain)

I2_DRDY

Date ready on DRDY_G/INT2_G. Default value: 0. (0: Disable; 1: Enable)

I2_WTM

FIFO watermark interrupt on DRDY_G/INT2_G. Default value: 0.

(0: Disable; 1: Enable)

I2_ORun

FIFO overrun interrupt on DRDY_G/INT2_G Default value: 0. (0: Disable; 1: Enable)

I2_Empty

FIFO empty interrupt on DRDY_G/INT2_G. Default value: 0. (0: Disable; 1: Enable)

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