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STM8TL52X4 Datenblatt(PDF) 40 Page - STMicroelectronics |
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STM8TL52X4 Datenblatt(HTML) 40 Page - STMicroelectronics |
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40 / 84 page ![]() Option byte STM8TL52x4 STM8TL53x4 40/84 DocID022344 Rev 7 7 Option byte Option byte contain configurations for device hardware features as well as the memory protection of the device. They are stored in a dedicated row of the memory. All option byte can be modified only in ICP mode (with SWIM) by accessing the EEPROM address. See Table 10 for details on option byte addresses. Refer to the STM8TL5xxx Flash programming manual (PM0212) and STM8 SWIM and debug manual (UM0470) for information on SWIM programming procedures. Table 10. Option byte Addr. Option name Option byte No. Option bits Factory default setting 76 5 4 3 2 1 0 0x4800 Read-out protection (ROP) OPT0 ROP[7:0] 0xAA 0x4801 - - Must be programmed to 0x00 0x00 0x4802 User Boot code size (UBC) OPT1 UBC[7:0] 0x00 0x4803 DATASIZE OPT2 DATASIZE[7:0] 0x00 0x4807 PCODESIZE OPT3 PCODESIZE[7:0] 0x00 0x4808 Window watchdog and independent window watchdog OPT4 [3:0] Reserved WWDG _HALT WWDG _HW IWDG _HALT IWDG _HW 0x00 Table 11. Option byte description Option byte number Description OPT0 ROP[7:0] Memory readout protection (ROP) 0xAA: Readout protection disabled (write access via SWIM protocol) Refer to Read-out protection section in the STM8TL5xxx reference manual (RM0312) for details. OPT1 UBC[7:0] Size of the user boot code area 0x00: no UBC 0x01-0x02: UBC contains only the interrupt vectors. 0x03: Page 0 and 1 reserved for the interrupt vectors. Page 2 is available to store user boot code. Memory is write protected ... 0xFF: Page 0 to 254 reserved for UBC, memory is write protected Refer to User boot area (UBC) section in the STM8TL5xxx reference manual (RM0312) for more details. |
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