www.ti.com

EXAMPLE BOARD LAYOUT

0.07 MIN

ALL AROUND

0.07 MAX

ALL AROUND

16X (0.24)

16X (0.6)

(

0.2) TYP

VIA

12X (0.5)

(2.8)

(2.8)

(0.58)

TYP

(

1.68)

(R0.05)

ALL PAD CORNERS

(0.58) TYP

VQFN - 1 mm max height

RGT0016C

PLASTIC QUAD FLATPACK - NO LEAD

4222419/B 11/2016

SYMM

1

4

5

8

9

12

13

16

SYMM

LAND PATTERN EXAMPLE

SCALE:20X

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271).

5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

SOLDER MASK

DEFINED

METAL

SOLDER MASK

OPENING

SOLDER MASK DETAILS

NON SOLDER MASK

DEFINED

(PREFERRED)