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M34E02-F Datenblatt(PDF) 22 Page - STMicroelectronics |
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M34E02-F Datenblatt(HTML) 22 Page - STMicroelectronics |
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22 / 36 page ![]() Use within a DDR1/DDR2/DDR3 DRAM module M34E02-F 22/36 DocID10367 Rev 14 Figure 11. Serial presence detect block diagram 1. E0, E1 and E2 are wired at each DRAM module slot in a binary sequence for a maximum of 8 devices. 2. Common clock and common data are shared across all the devices. R = 4.7 k Ω AI01937b DRAM module slot number 7 SDA SCL E0 E1 E2 VCC DRAM module slot number 6 SDA SCL E0 E1 E2 DRAM module slot number 5 SDA SCL E0 E1 E2 DRAM module slot number 4 SDA SCL E0 E1 E2 DRAM module slot number 3 SDA SCL E0 E1 E2 DRAM module slot number 2 SDA SCL E0 E1 E2 VCC DRAM module slot number 1 SDA SCL E0 E1 E2 DRAM module slot number 0 SDA SCL E0 E1 E2 VSS VSS VSS VCC VSS VSS VCC VCC VSS VCC VCC VSS VSS VCC SCL line SDA line From the motherboard I2C master controller |
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