NJG1600KB2

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TERMINAL INFORMATION

No.

SYMBOL

DESCRIPTION

1

P1

RF port. This port is connected with PC port by controlling 4

2.5~6.5V and 6

to block the DC bias voltage of internal circuit.

(50~100MHz:0.01uF,

0.1~0.5GHz: 1000pF, 0.5~2.5GHz: 56pF)

2

GND

Ground terminal. Please connect this terminal with ground plane as close as

possible for excellent RF performance.

3

P2

RF port. This port is connected with PC port by controlling 6

2.5~6.5V and 4

to block the DC bias voltage of internal circuit.

(50~100MHz:0.01uF,

0.1~0.5GHz: 1000pF, 0.5~2.5GHz: 56pF)

4

VCTL2

Control port 2. The voltage of this port controls PC to P1 state. The ‘ON’ and

‘OFF’ state is toggled by controlling voltage of this terminal such as

high-state (2.5~6.5V) or low-state (-0.2~+0.2V). The voltage of 6

be set to opposite state. The bypass capacitor has to be chosen to reduce

switching time delay from 10pF~1000pF range.

5

PC

Common RF port. In order to block the DC bias voltage of internal circuit, an

external capacitor is required.

(50~100MHz:0.01uF, 0.1~0.5GHz: 1000pF,

0.5~2.5GHz: 56pF)

6

VCTL1

Control port 1. The voltage of this port controls PC to P2 state. The ‘ON’ and

‘OFF’ state is toggled by controlling voltage of this terminal such as

high-state (2.5~6.5V) or low-state (-0.2~+0.2V). The voltage of 4

be set to opposite state. The bypass capacitor has to be chosen to reduce

switching time delay from 10pF~1000pF range.

TENTATIVE