LP3906 datasheet(16/38 Pages) NSC

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SW1, SW2: Synchronous Step

Down Magnetic DC/DC Converters

FUNCTIONAL DESCRIPTION

The LP3906 incorporates two high efficiency synchronous

switching buck regulators, SW1 and SW2 that deliver a

constant voltage from a single Li-Ion battery to the portable

system processors. Using a voltage mode architecture with

synchronous rectification, both bucks have the ability to

deliver up to 1500mA depending on the input voltage and

output voltage (voltage head room), and the inductor chosen

(maximum current capability).

There are three modes of operation depending on the cur-

rent required - PWM, PFM, and shutdown. PWM mode

handles current loads of approximately 70mA or higher,

delivering voltage precision of +/-3% with 90% efficiency or

better. Lighter output current loads cause the device to au-

tomatically switch into PFM for reduced current consumption

Q = 15 µA typ.) and a longer battery life. The Standby

operating mode turns off the device, offering the lowest

current consumption. PWM or PFM mode is selected auto-

matically or PWM mode can be forced through the setting of

the buck control register.

Both SW1 and SW2 can operate up to a 100% duty cycle

(PMOS switch always on) for low drop out control of the

output voltage. In this way the output voltage will be con-

trolled down to the lowest possible input voltage.

Additional features include soft-start, under-voltage lock-out,

current overload protection, and thermal overload protection.

CIRCUIT OPERATION DESCRIPTION

A buck converter contains a control block, a switching PFET

connected between input and output, a synchronous rectify-

ing NFET connected between the output and ground (BCK-

GND pin) and a feedback path. During the first portion of

each switching cycle, the control block turns on the internal

PFET switch. This allows current to flow from the input

through the inductor to the output filter capacitor and load.

The inductor limits the current to a ramp with a slope of

by storing energy in a magnetic field. During the second

portion of each cycle, the control block turns the PFET

switch off, blocking current flow from the input, and then

turns the NFET synchronous rectifier on. The inductor draws

current from ground through the NFET to the output filter

capacitor and load, which ramps the inductor current down

with a slope of

The output filter stores charge when the inductor current is

high, and releases it when low, smoothing the voltage across

the load.

PWM OPERATION

During PWM operation the converter operates as a voltage-

mode controller with input voltage feed forward. This allows

the converter to achieve excellent load and line regulation.

The DC gain of the power stage is proportional to the input

voltage. To eliminate this dependence, feed forward voltage

inversely proportional to the input voltage is introduced.

INTERNAL SYNCHRONOUS RECTIFICATION

While in PWM mode, the buck uses an internal NFET as a

synchronous rectifier to reduce rectifier forward voltage drop

and associated power loss. Synchronous rectification pro-

vides a significant improvement in efficiency whenever the

output voltage is relatively low compared to the voltage drop

across an ordinary rectifier diode.

CURRENT LIMITING

A current limit feature allows the converter to protect itself

and external components during overload conditions. PWM

mode implements current limiting using an internal compara-

tor that trips at 2.0 A (typ). If the output is shorted to ground

the device enters a timed current limit mode where the NFET

is turned on for a longer duration until the inductor current

falls below a low threshold, ensuring inductor current has

more time to decay, thereby preventing runaway.

A current limit feature allows the buck to protect itself and

external components during overload conditions PWM mode

implements cycle-by-cycle current limiting using an internal

comparator that trips at 2000mA (typical).

PFM OPERATION

At very light loads, the converter enters PFM mode and

operates with reduced switching frequency and supply cur-

rent to maintain high efficiency.

The part will automatically transition into PFM mode when

either of two conditions occurs for a duration of 32 or more

clock cycles:

A. The inductor current becomes discontinuous

B. The peak PMOS switch current drops below the I

MODE

level

During PFM operation, the converter positions the output

voltage slightly higher than the nominal output voltage during

PWM operation, allowing additional headroom for voltage

drop during a load transient from light to heavy load. The

PFM comparators sense the output voltage via the feedback

pin and control the switching of the output FETs such that the

output voltage ramps between 0.8% and 1.6% (typical)

above the nominal PWM output voltage. If the output voltage

is below the ‘high’ PFM comparator threshold, the PMOS

power switch is turned on. It remains on until the output

voltage exceeds the ‘high’ PFM threshold or the peak current

exceeds the I

PFM level set for PFM mode. The typical peak

current in PFM mode is:

Once the PMOS power switch is turned off, the NMOS

power switch is turned on until the inductor current ramps to

zero. When the NMOS zero-current condition is detected,

the NMOS power switch is turned off. If the output voltage is

below the ‘high’ PFM comparator threshold (see figure be-

low), the PMOS switch is again turned on and the cycle is

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