PC87334VLJ datasheet(36/102 Pages) NSC

36 / 102 page

30 FDC Register Description (Continued)

322 Status Register 1 (ST1)

DESC

RESET

COND

End of Track

Controller transferred the last byte of

the last sector without the Terminal Count (TC) pin

64 (PQFPTQFP) becoming active The last sector

is the End of Track sector number programmed in

the Command Phase

Not Used Always 0

CRC Error

If this bit is set and bit 5 of ST2 is clear

then there was a CRC error in the Address Field of

the correct sector If bit 5 of ST2 is also set then

there was a CRC error in the Data Field

Overrun

Controller was not serviced by the mP

soon enough during a data transfer in the Execution

Phase For read operations indicates a data over-

run For write operations indicates a data underrun

Not Used Always 0

No Data

Three possible problems

1 Controller cannot find the sector specified in the

Command Phase during the execution of a Read

Write Scan or Verify command An address

mark was found however so it is not a blank disk

2 Controller cannot read any Address Fields with-

out a CRC error during a Read ID command

3 Controller cannot find starting sector during exe-

cution of Read A Track command

Not Writable

Write Protect pin is active when a

Write or Format command is issued

Missing Address Mark

If bit 0 of ST2 is clear then

the controller cannot detect any Address Field Ad-

dress Mark after two disk revolutions If bit 0 of ST2

is set then the controller cannot detect the Data

Field Address Mark after finding the correct Ad-

dress Field

323 Status Register 2 (ST2)

DESC

SEH

SNS

RESET

000

COND

Not Used Always 0

Control Mark

Controller tried to read a sector

which contained a deleted data address mark dur-

ing execution of Read Data or Scan commands Or

if a Read Deleted Data command was executed a

regular address mark was detected

CRC Error in Data Field

Controller detected a

CRC error in the Data Field Bit 5 of ST1 is also set

Wrong Track

Only set if desired sector is not

found and the track number recorded on any sector

of the current track is different from the track ad-

dress specified in the Command Phase

Scan Equal Hit

‘‘Equal’’ condition satisfied during

any Scan command

Scan Not Satisfied

Controller cannot find a sector

on the track which meets the desired condition dur-

ing any Scan command

Bad Track

Only set if the desired sector is not

found the track number recorded on any sector on

the track is FFh indicating a hard error in IBM

for-

mat and is different from the track address speci-

fied in the Command Phase

Missing Address Mark in Data Field

Controller

cannot find the Data Field Address Mark (AM) dur-

ing a Read Scan or Verify command Bit 0 of ST1

is also set

324 Status Register 3 (ST3)

DESC

TK0

HDS

DS1

DS0

RESET

101

COND

Not Used Always 0

Write Protect

Indicates active high status of the

WP pin

Not Used Always 1

Track 0

Indicates active high status of the TRK0

Not Used Always 1

Head Select

Indicates the active high status of the

HD bit in the Command Phase

D1 – 0

Drive Select 10

These two binary encoded bits

indicate the DS1 – 0 bits in the Command Phase

40 FDC Command Set Description

This section presents the FDC command setfull descrip-

tion in Section 41 and a working summary in Section 42

Each command contains a unique first command byte the

opcode byte which tells the controller how many (0 or

more) command bytes to expect The information for each

command is displayed using the structure shown in

Figure

4-1

If an invalid command byte is issued to the controller it

immediately enters the Result Phase and the status is 80h

signifying an Invalid Command

IO Operation

Opcode

Command Byte 1

Command Byte 2

Command Byte n

FIGURE 4-1 FDC Command Structure

41 COMMAND DESCRIPTIONS

411 Configure Command

The Configure Command controls some operation modes of

the controller It should be issued during the initialization of

the FDC after power-up These bits are set to their default

values after a hardware reset The value of each bit after a

software reset is explained The default value of each bit is

denoted by a ‘‘bullet’’ to the left of each item

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