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DLP2000 Datenblatt(PDF) 7 Page - Texas Instruments |
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DLP2000 Datenblatt(HTML) 7 Page - Texas Instruments |
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7 / 40 page ![]() 7 DLP2000 www.ti.com DLPS078 – JULY 2017 Product Folder Links: DLP2000 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to GND (VSS). VOFFSET, VCC, VBIAS, VRESET and VSS power supplies are required for the normal DMD operating mode. (3) To prevent excess current, the supply voltage delta |VBIAS – VOFFSET| must be less than 8.75 V. (4) BSA to Reset Timing specifications are synchronous and guaranteed for DCLK between 60 MHz and 80 MHz. (5) The highest temperature of the active array (as calculated by the Micromirror Array Temperature Calculation) or of any point along the Window Edge as defined in Figure 10. (6) The DLP2000 DMD is intended for use in well controlled, low dew point environments. Please contact your local TI sales person or TI distributor representative to determine if this device is suitable for your application and operating environment compared to other DMD solutions. DLP Products offers a broad portfolio of DMDs suitable for a wide variety of applications. (7) Temperature delta is the highest difference between the ceramic test point 1 (TP1) and anywhere on the window edge as shown in Figure 10. 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Supply Voltage VCC LVCMOS Logic Supply Voltage (2) –0.5 4 V VOFFSET Mirror Electrode and HVCMOS Voltage (2) –0.5 8.75 V VBIAS Mirror Electrode Voltage –0.5 17 V |VBIAS – VOFFSET| Supply Voltage Delta (3) 8.75 V VRESET Mirror Electrode Voltage –11 0.5 V Input Voltage Input voltage: other inputs See (2) –0.5 VCC + 0.3 V Clock Frequency DCLK Clock Frequency (4) 60 80 MHz Environmental TARRAY and TWINDOW Temperature – operational (5) –20 90 °C Temperature – non-operational(5) –40 90 °C TDP Dew Point Temperature - operating and non-operating (non-condensing) See Note(6) °C |TDELTA| Absolute Temperature delta between any point on the window edge and the ceramic test point TP1(7) 30 °C (1) The DLP2000 DMD is intended for use in well controlled, low dew point environments. Please contact your local TI sales person or TI distributor representative to determine if this device is suitable for your application and operating environment compared to other DMD solutions. DLP Products offers a broad portfolio of DMDs suitable for a wide variety of applications. 6.2 Storage Conditions Applicable before the DMD is installed in the final product MIN MAX UNIT TDMD DMD Temperature –40 85 °C TDP Dew Point Temperature (non-condensing) See Note(1) °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. 6.3 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V |
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