Datenblatt-Suchmaschine für elektronische Bauteile
  German  ▼
ALLDATASHEETDE.COM

X  

WM8803CDT/V Datenblatt(PDF) 14 Page - Wolfson Microelectronics plc

Teilenummer WM8803CDT/V
Bauteilbeschribung  DIGITAL AUDIO INTERFACE RECEIVER
PDF  45 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Hersteller  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8803CDT/V Datenblatt(HTML) 14 Page - Wolfson Microelectronics plc

Back Button WM8803CDT/V Datasheet HTML 10Page - Wolfson Microelectronics plc WM8803CDT/V Datasheet HTML 11Page - Wolfson Microelectronics plc WM8803CDT/V Datasheet HTML 12Page - Wolfson Microelectronics plc WM8803CDT/V Datasheet HTML 13Page - Wolfson Microelectronics plc WM8803CDT/V Datasheet HTML 14Page - Wolfson Microelectronics plc WM8803CDT/V Datasheet HTML 15Page - Wolfson Microelectronics plc WM8803CDT/V Datasheet HTML 16Page - Wolfson Microelectronics plc WM8803CDT/V Datasheet HTML 17Page - Wolfson Microelectronics plc WM8803CDT/V Datasheet HTML 18Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 14 / 45 page
background image
WM8803
Product Preview
w
PP Rev 1.1 September 2003
14
512fs set
Data input
(512/2)fs set
PLLCK0 = 1
PLLCK1 = 1
CLKOUT output
24.576 MHz
PLLCK0 = 0
PLLCK1 = 1
Yes
No
fs = 96 kHz
fs = 48 kHz
LOCK
detection
fs
calculation
Figure 6 Flowchart for CLKOUT Output Clock Narrow Band Operation
The tables below show the output clocks in XIN and PLL clock source modes.
PLLCK1
PLLCK0
XISEL1
XISEL0
CLKOUT
BCLK
LRCLK
0
0
0
0
11.2896MHz
2.8224MHz
44.1kHz
0
0
0
1
12.2880MHz
3.0720MHz
48kHz
0
0
1
0
16.9344MHz
4.2336MHz
66.15kHz
0
1
0
0
11.2896MHz
1.8816MHz
29.4kHz
0
1
0
1
12.2880MHz
2.0480MHz
32kHz
0
1
1
0
16.9344MHz
2.8224MHz
44.1kHz
1
0
0
0
11.2896MHz
2.8224MHz
44.1kHz
1
0
0
1
12.2880MHz
3.0720MHz
48kHz
1
0
1
0
16.9344MHz
4.2336MHz
66.15kHz
1
1
0
0
11.2896MHz
2.8224MHz
44.1kHz
1
1
0
1
12.2880MHz
3.0720MHz
48kHz
1
1
1
0
16.9344MHz
4.2336MHz
66.15kHz
Table 6 XIN Clock Source Mode Output Clocks
Note:
1.
XISEL2 = 0, PLL unlocked state or forced setting



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45


Datenblatt Download

Go To PDF Page


Link URL



War ALLDATASHEET hilfreich?  [ DONATE ] 

Über Alldatasheet   |   Werbung   |   Kontakt   |   Privatsphäre und Datenschutz   |   Link zum Datenblatt    |   Linktausch   |   Hersteller
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com