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EC5602 Datenblatt(PDF) 9 Page - E-CMOS Corporation |
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EC5602 Datenblatt(HTML) 9 Page - E-CMOS Corporation |
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9 / 12 page ![]() EC5602 High Slew Rate Rail-to-Rail Dual Operational Amplifiers E-CMOS Corp. (www.ecmos.com.tw) Page 9 of 12 6A27N Rev. F002 1 The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the loads, or: PDmax = Σ[VS * ISmax + (VS+ – VO) * IL] When sourcing, and PDmax = Σ[VS * ISmax + (VO – VS-) * IL] When sinking. Where: i = 1 to 2 VS = Total Supply Voltage ISmax = Maximum Supply Current Per Amplifier VO = Maximum Output Voltage of the Application IL= Load current RL= Load Resistance = (VS+ – VO)/IL = (VO – VS-)/ IL A calculation for RL to prevent device from overheat can be easily solved by setting the two PDmax equations equal to each other. Package Θja (℃/W) Θjc (℃/W) MSOP-8 201 78 SOP-8(EXPOSED PAD) 60 16 TSSOP-8 230 69 Driving Capacitive Loads The EC5602 is designed to drive a wide range of capacitive loads. In addition, the output current handling capability of the device allows for good slewing characteristics even with large capacitive loads. The combination of these features make the EC5602 ideally for applications such as TFT LCD panel grayscale reference voltage buffers, ADC input amplifiers, etc. As load capacitance increases, however, the -3dB bandwidth of the device will decrease and the peaking increase. less peaking is desired in these applications, a small series resistor (usually between 5Ω series with the output. However, this will obviously reduce the gain slightly. Another method of reducing peaking is to add a "snubber" circuit at the output. A snubber is a shunt load consisting of a resistor in series with a capacitor. Values of nF are typical. The advantage of a snubber is that it improves the settling and overshooting performance while does not draw any DC load current or reduce the gain. Power Supply Bypassing and Printed Circuit Board Layout With high phase margin, the EC5602 performs stable gain at high frequency. Like any high-frequency device, good layout of the printed circuit board usually comes with optimum performance. Ground plane construction is highly recommended, lead lengths should be as short as possible and the power supply pins must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to ground, a 0.1µF ceramic capacitor should be placed from VS+ pin to VS- pin as a bypassing capacitor. A 4.7µF tantalum capacitor should then be connected in parallel, placed in the region of the amplifier. One 4.7µF capacitor may be used for multiple devices. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. |
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