Block Diagram

Pin Assignment

Pad Assignment

HT81006/HT81009

HT81XXX

Rev. 1.40

2

March 1, 2005

I / O 2

I / O 1

K E Y 4

V D D

O S C I

K E Y 1

K E Y 2

K E Y 3

V P P

V S S

O U T 3

V S S

O U T 2

V D D

O U T 1

1 6

1 5

1 4

1 3

1 2

1 1

1 0

9

1

2

3

4

5

6

7

8

H T 8 1 R 0 9 / H T 8 1 R 1 8 / H T 8 1 R 3 6

1 6 D I P - A

O E

I / O 2

I / O 1

K E Y 4

V D D

O S C I

K E Y 1

K E Y 2

K E Y 3

N C

V S S

O U T 3

V S S

O U T 2

V D D

O U T 1

H T 8 1 0 0 6 / H T 8 1 0 0 9

H T 8 1 0 1 2 / H T 8 1 0 1 8

1 6 D I P - A

N C

1 6

1 5

1 4

1 3

1 2

1 1

1 0

9

1

2

3

4

5

6

7

8

D e b o u n c e

C i r c u i t

O n e - s h o t

O s c i l l a t o r

C i r c u i t

T i m e B a s e

G e n e r a t o r

R O M A d d r e s s

C o u n t e r

A u d i o

C o n t r o l l e r

D a t a R O M

I / O 1

I / O 2

S t a t u s

D i s p l a y

C o n t r o l l e r

V D D

V S S

O S C I

S e l e c t o r

O U T 2

O U T 3

O U T 1

K E Y 1 ~ 4

1

2

V D D

O S C I

K E Y 3

V S S

O U T 1

V D D

O U T 2

I / O 2

I / O 1

K E Y 4

3

4

5

6

7

8

9

1 0

1 1

1 2

1 3

1 4

( 0 , 0 )

Chip size: 41.9

´ 70.3 (mil)

2

* The IC substrate should be connected to VSS in the PCB layout artwork.