DSP56166ROM datasheet(53/63 Pages) MOTOROLA

53 / 63 page

PRELIMINARY - 6/15/93

DSP56166 Technical Data Sheet

MOTOROLA

Num

Characteristic

60MHz

Case

Unit

Min

Max

150

SCK Clock Cycle (see Note 1)

TBD

—

x ck

151

SCK Clock High Period

TBD

—

x ck

152

SCK Clock Low Period

TBD

—

x ck

153

SCK Clock Rise/Fall Time

—

TBD

x ck

154

SCK Rising Edge to SFS Out

(bl) High

—

TBD

x ck

155

SCK Rising Edge to SFS Out

(bl) Low

—

TBD

x ck

156

SCK Rising Edge to SFS Out

(wl) High

—

TBD

x ck

157

SCK Rising Edge to SFS Out

(wl) Low

—

TBD

x ck

158

Data In Setup Time Before

SCK Falling Edge

TBD

—

x ck

159

Data In Hold Time After SCK

Falling Edge

TBD

—

x ck

160

SCK Rising Edge to SFS In (bl)

High

—

TBD

x ck

161

SCK Rising Edge to SFS In (bl)

Low

—

TBD

x ck

162

SCK Rising Edge to SFS In

(wl) High

—

TBD

x ck

163

SCK Rising Edge to Data

Out Enable from High

Impedance

—

TBD

x ck

164

SCK Rising Edge to Data

Out Valid

—

TBD

x ck

165

SCK Rising Edge to Data

Out Invalid

—

TBD

x ck

166

SCK Rising Edge to Data

Out High Impedance

—

TBD

x ck

AC Electrical Characteristics — RSSI Timing (Continued)

DSP56166ROM Datenblatt(PDF) 53 Page - Motorola, Inc

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