DSP56166ROM datasheet(2/63 Pages) MOTOROLA

2 / 63 page

Figure 1 DSP56166 Block Diagram

XDB

PDB

GDB

7+10

ADDRESS

PROGRAM CONTROL UNIT

MODA/IRQA

MODB/IRQB

ON-CHIP

PERIPHERALS

HOST, RSSI0,

RSSI1, TIMER

GPI/O, CODEC

INTERNAL DATA

BUS SWITCH

AND BIT

MANIPULATION

UNIT

EXTERNAL

ADDRESS

BUS

SWITCH

BUS

CONTROL

EXTERNAL

DATA BUS

SWITCH

BOOTSTRAP

ROM

64x16

PROGRAM

RAM

2Kx16

DATA

RAM

4Kx16

PROGRAM

ADDRESS

GENERATOR

PROGRAM

DECODE

CONTROLLER

PROGRAM

INTERRUPT

CONTROLLER

DATA ALU

16x16+40 - 40-BIT MAC

TWO 40-BIT ACCUMULATORS

CLOCK

AND PLL

EXTAL

PORT B

HOST

CODEC,

PORT C

AND/OR

RSSI0,

RSSI1,

TIMER

RESET

16 BITS

DATA

OnCE

SXFC

CLKO

XAB1

XAB2

PAB

ADDRESS

GENERATION

UNIT

MODC/IRQC

In the USA:

For technical assistance call:

DSP Applications Helpline (512) 891-3230

For availability and literature call your local Motorola Sales Ofﬁce or Authorized Distributor.

For free application software and information call the Dr. BuB electronic bulletin board:

9600/4800/2400/1200/300 baud

(512) 891-3771

(8 data bits, no parity, 1 stop)

In Europe, Japan and Asia Paciﬁc

Contact your regional sales ofﬁce or Motorola distributor.

Note: For the ROM part only (DSP56166ROM) — Since the on-chip XROM is only connected to the XAB1 address

bus, the data located in this ROM is only accessible by the first read of a single read instruction or the first read

of a dual parallel read instruction. Therefore, during development using the RAM based part, the data to be

mapped in the on-chip XROM on the ROM based part should not be accessed with a second read during a

dual parallel read instruction.

DSP56166 Technical Data Sheet

MOTOROLA

DSP56166ROM Datenblatt(PDF) 2 Page - Motorola, Inc

DSP56166ROM Datenblatt(HTML) 2 Page - Motorola, Inc

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