| Datenblatt-Suchmaschine für elektronische Bauteile |
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AD8450ASTZ Datenblatt(PDF) 31 Page - Analog Devices |
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AD8450ASTZ Datenblatt(HTML) 31 Page - Analog Devices |
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31 / 42 page ![]() AD8450 Data Sheet Rev. B | Page 30 of 41 POWER-OFF SEQUENCE To power off the device, take the following steps: 1. Turn off the input signals. 2. Turn off DVCC. 3. Turn off AVEE. 4. Turn off AVCC. The positive analog supply (AVCC) and the negative analog supply (AVEE) may be turned off simultaneously. PGIA CONNECTIONS For a description of the PGIA, see the Theory of Operation section, Figure 49, and Figure 51. The internal gains of the PGIA (26, 66, 133, and 200) are selected by hardwiring the appropriate pin combinations (see Table 5). Table 5. PGIA Gain Connections PGIA Gain Connect RGP (Pin 2) to Connect RGN (Pin 19) to 26 ISGP0 (Pin 4) ISGN0 (Pin 17) 66 ISGP1 (Pin 6) ISGN1 (Pin 15) 133 ISGP2 (Pin 8) ISGN2 (Pin 13) 200 ISGP3 (Pin 9) ISGN3 (Pin 12) If a different gain value is desired, connect 10 kΩ feedback resistors between the inverting inputs of the PGIA preamplifiers (RGP and RGN pins) and the outputs of the PGIA preamplifiers (RFBP and RFBN pins). Also, connect a gain resistor (RG) between the RGP and RGN pins. When using external resistors, the gain of the PGIA is Gain = 2 × (1 + 20 kΩ/RG) BATTERY LEVEL SHIFTER ADP1972 PWM VCTRL SENSE RESISTOR ISVP ISVN BVPx BVNx AVCC OUTPUT DRIVERS BATTERY CURRENT AVEE CV BUFFER – + – + 1× VINT BUFFER VSET ISET C D C D C D VINT ISMEA BVMEA OCPS OCPR OVPR VREF OVERCURRENT COMPARATOR OVERVOLTAGE COMPARATOR FAULT OVPS OUTPUT FILTER PGDA – + – + PGIA DC-TO-DC POWER CONVERTER 1× SET BATTERY CURRENT SET BATTERY VOLTAGE AD8450 CONTROLLER CONSTANT VOLTAGE LOOP FILTER AMPLIFIER CC AND CV GATES CONSTANT CURRENT LOOP FILTER AMPLIFIER MODE SWITCHES (3) C = CHARGE D = DISCHARGE EXTERNAL PASSIVE COMPENSATION NETWORK NOR Figure 59. Complete Signal Path of a Battery Test or Formation System Suitable for Li-Ion Batteries |
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