K6F8016R6D Family

Revision 0.1

September 2004

2

CMOS SRAM

Preliminary

512K x 16 bit Super Low Power and Low Voltage Full CMOS Static RAM

GENERAL DESCRIPTION

The K6F8016R6D families are fabricated by SAMSUNG

′s

advanced full CMOS process technology. The families support

industrial operating temperature ranges and have chip scale

package for user flexibility of system design. The families also

support low data retention voltage for battery back-up operation

with low data retention current.

FEATURES

• Process Technology: Full CMOS

• Organization: 512K x16

• Power Supply Voltage: 1.65~1.95V

• Low Data Retention Voltage: 1.0V(Min)

• Three State Outputs

• Package Type: 48-FBGA-6.00x7.00

Name

Function

Name

Function

Chip Select Inputs

Vcc

Power

OE

Output Enable Input

Vss

Ground

WE

Write Enable Input

UB

Address Inputs

LB

DNU

Do Not Use

PRODUCT FAMILY

°C and not 100% tested.

Product Family

Operating Temperature

Vcc Range

Speed

Power Dissipation

PKG Type

Standby

Operating

K6F8016R6D-F

Industrial(-40~85

°C)

1.65~1.95V

70ns

0.5

2mA

48-FBGA-6.00x7.00

SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.

FUNCTIONAL BLOCK DIAGRAM

Clk gen.

Row

select

Data

cont

Data

cont

Data

cont

Vcc

Vss

Precharge circuit.

Memory array

1024 rows

512

×16 columns

I/O Circuit

Column select

PIN DESCRIPTION

48-FBGA: Top View (Ball Down)

LB

OE

A0

A1

A2

CS2

I/O9

UB

A3

A4

CS1

I/O1

I/O10

I/O11

A5

A6

I/O2

I/O3

Vss

I/O12

A17

A7

I/O4

Vcc

Vcc

I/O13

DNU

A16

I/O5

Vss

I/O15

I/O14

A14

A15

I/O6

I/O7

I/O16

DNU

A12

A13

WE

I/O8

A18

A8

A9

A10

A11

DNU

1

2

3

4

5

6

A

B

C

D

E

F

G

H

WE

OE

UB

CS1

LB

Control Logic

CS2

Row

Addresses

Column Addresses