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MP4056GS Datenblatt(PDF) 19 Page - Monolithic Power Systems |
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MP4056GS Datenblatt(HTML) 19 Page - Monolithic Power Systems |
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19 / 26 page ![]() MP4056—TRIAC DIMMABLE, NON-ISOLATED OFFLINE LED CONTROLLER WITH APFC MP4056 Rev.1.01 www.MonolithicPower.com 19 11/9/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. Thermal Shutdown To prevent IC from thermal damage, the MP4056 latches off the switching cycle when the junction temperature is higher than 150°C. When the VCC drops below UVLO, it restarts again. Adaptive Dimmer Type Detection The MP4056 integrates adaptive dimmer type detection to accurately detect which kind of dimmer is connected at the system start-up, leading edge dimmer, trailing edge dimmer or no dimmer. The MP4056 works in different modes depending on these dimmer types to achieve the best dimmer compatibility at the highest performance. Phase-Cut-Based Dimming Control The MP4056 implements phase-cut-based dimming control (both for leading edge and trailing edge dimmers). For leading edge dimmers, most of them are TRIAC-based. The TRIAC dimmer usually consists of a bi-directional SCR and an adjustable turn on phase. Figure 10 shows the leading-edge TRIAC dimmer waveforms. Line voltage after TRIAC dimmer Input line voltage before TRIAC dimmer Rectified line voltage Dimmer turn on phase Line cycle Figure 10: Leading Edge Dimmer Waveforms For trailing edge dimmers, the waveforms are shown in Figure 11. Dimmer turn on Phase Line Cycle Input line voltage before TRIAC dimmer Input line voltage after TRIAC dimmer Rectified line voltage Figure 11: Trailing Edge Dimmer Waveforms MP4056 detects the dimming turn-on cycle through the MULT pin. Based on the turn-on cycle, the control circuitry adjusts the internal reference voltage. MULT voltage exceeding VMULT_ON is recognized as a dimmer turn-on signal, MULT voltage below VMULT_OFF is recognized as a dimmer turn-off signal. MP4056 has a 30% line- cycle-detection blanking time at each line cycle. The real phase detector output adds this blanking time to determine the reference voltage, if it is higher than 100%, the reference voltage is clamped to 100%, as shown in Figure 12. This means if the turn-on cycle exceeds 70% of the line cycle, the reference maintains the maximum current value, which keeps the maximum output current with different dimmers is almost the same with the rated output current. MULT Comparator Output 30% line cycle blanking Turn on cycle detector output VMULT_ON VMULT_OFF Figure 12: Dimming Turn-On Cycle Detector When the turn-on cycle decreases to less than 70%, the internal reference voltage decreases, lowers the output current. As the dimming turn-on cycle decreases, the COMP voltage also decreases. For leading edge dimmers, once the COMP voltage reaches VCOMPL_LD, it is clamped. The output current decreases slowly to maintain the TRIAC holding current and avoid random flicker. Figure 13 shows the relationship between the leading edge dimming turn-on phase and output current. |
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