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MP4056GS Datenblatt(PDF) 20 Page - Monolithic Power Systems |
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MP4056GS Datenblatt(HTML) 20 Page - Monolithic Power Systems |
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20 / 26 page ![]() MP4056—TRIAC DIMMABLE, NON-ISOLATED OFFLINE LED CONTROLLER WITH APFC MP4056 Rev.1.01 www.MonolithicPower.com 20 11/9/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. Io Dimming turn on cycle 100% 30% 70% VCOMP Figure 13: Leading Edge Dimming Curve For trailing edge dimmers, there is no holding current, the COMP voltage is clamped at a lower level VCOML_TL to get deeper dimming depth. Figure 14 shows the relationship between the trailing edge dimming turn-on phase and output current. Io Dimming turn on cycle 100% 40% 70% VCOMP Figure 14: Trailing Edge Dimming Curve Dimming Pull-Down Current Source There are three kinds of dimming pull down current source in MP4056. The IDP_TL current source is for trailing edge dimming, the other two (weak/strong) current sources are for leading edge dimming. The dimming pull down current is used to pull down the rectified line voltage to zero quickly to avoid any mis-detection on the MULT pin. If the leading edge dimmer is detected, the dimming pull-down current source turns on when the MULT decreases to VMULT_DP_ON_LD and turns off until the MULT increases to VMULT_DP_OFF_LD. If trailing edge dimmer is detected, the dimming pull-down current source turns on when the MULT decreases to VMULT_DP_ON_TL and turns off until the MULT increases to VMULT_DP_OFF_TL. The weak/strong dimming pull down current source is selected through different resistance on the ZCD pin. Figure 15 shows the selected logic: If IDP_DET_LD *(R1+R2//R3)≥VEN_DP_STR_LD Strong dimming pull-down current source is selected; otherwise, weak dimming pull down current source is selected. In real application design, the weak/strong dimming pull down current selection is related to the detailed application SPEC. + ZCD - tDP_DET_LD VEN_DP_STR_LD S R1 R2 R3 IDP_DET_LD Strong _DP Figure 15: Weak/Strong Dimming Pull Down Current Source Selection Damping Circuit Control If a leading edge dimmer or trailing edge dimmer is detected, the damping circuit is enabled to limit the inrush current at the moment dimmer turns on. If no dimmer is detected, the damping circuit is disabled by pulling up the damp pin voltage so the damping resister is shorted by the damping MOSFET. The damp pin voltage begins to be pulled up if MULT voltage increases higher than VMULT_DAMP_ON and begins to be pulled down when MULT voltage decreases lower than VMULT_DAMP_OFF. The maximum pull up current source is 100 μA while the max pull down current source is 400 μA. Color Temperature and Brightness Control for Warm Sunset Dimming application The color temperature and brightness control circuit is shown in figure 16. |
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