LTC2604IGN datasheet(4/16 Pages) LINER

4 / 16 page

LTC2604/LTC2614/LTC2624

2604f

TI I G CHARACTERISTICS

Note 1: Absolute maximum ratings are those values beyond which the life

of a device may be impaired.

Note 2: Linearity and monotonicity are defined from code kL to code

2N – 1, where N is the resolution and kL is given by kL = 0.016(2N/VREF),

rounded to the nearest whole code. For VREF = 4.096V and N = 16,

kL = 256, linearity is defined from code 256 to code 65,535.

Note 3: Digital inputs at 0V or VCC.

Note 4: DC crosstalk is measured with VCC = 5V and VREF = 4.096V, with

the measured DAC at midscale, unless otherwise noted.

Note 5: RL = 2kΩ to GND or VCC.

Note 6: Guaranteed by design and not production tested.

Note 7: Inferred from measurement at code 256 (LTC2604), code 64

(LTC2614) or code 16 (LTC2624), and at full scale.

Note 8: VCC = 5V, VREF = 4.096V. DAC is stepped 1/4 scale to 3/4 scale

and 3/4 scate to 1/4 scale. Load is 2k in parallel with 200pF to GND.

Note 9: VCC = 5V, VREF = 4.096V. DAC is stepped 1LSB between half scale

and half scale –1. Load is 2k in parallel with 200pF to GND.

Current Limiting

Load Regulation

Offset Error vs Temperature

(LTC2604/LTC2614/LTC2624)

The q denotes specifications which apply over the full operating temperature range, otherwise specifications

are at TA = 25°C. REF A = REF B = REF C = REF D = 4.096V (VCC = 5V), REF A = REF B = REF C = REF D = 2.048V (VCC = 2.5V),

REF LO = 0V, VOUT unloaded, unless otherwise noted.

IOUT (mA)

–40 –30 –20 –10

2604 G01

0.10

0.08

0.06

0.04

0.02

–0.02

–0.04

–0.06

–0.08

–0.10

VREF = VCC = 5V

VREF = VCC = 3V

VREF = VCC = 5V

VREF = VCC = 3V

CODE = MIDSCALE

IOUT (mA)

–35

–25

–15

–5

2604 G02

1.0

0.8

0.6

0.4

0.2

–0.2

–0.4

–0.6

–0.8

–1.0

VREF = VCC = 5V

CODE = MIDSCALE

VREF = VCC = 3V

TEMPERATURE (

°C)

–50

–30

–10

2604 G03

–1

–2

–3

TYPICAL PERFOR A CE CHARACTERISTICS

LTC2604/LTC2614/LTC2624

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

VCC = 2.5V to 5.5V

SDI Valid to SCK Setup

4ns

SDI Valid to SCK Hold

4ns

SCK High Time

9ns

SCK Low Time

9ns

CS/LD Pulse Width

LSB SCK High to CS/LD High

7ns

CS/LD Low to SCK High

7ns

SDO Propagation Delay from SCK Falling Edge

CLOAD = 10pF

VCC = 4.5V to 5.5V

VCC = 2.5V to 5.5V

CLR Pulse Width

t10

CS/LD High to SCK Positive Edge

7ns

SCK Frequency

50% Duty Cycle

MHz

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