CS82C52Z datasheet(10/21 Pages) RENESAS

10 / 21 page

82C52

FN2950 Rev 4.00

Page 10 of 21

November 25, 2015

82C52 - 80C86 Interfacing

The following example (Figure 11) shows the interface for an

82C52 in an 80C86 system.

Use of the Intersil CMOS Interrupt Controller (82C59A) is

optional and necessary only if an interrupt driven system is

desired.

By using the Intersil CMOS 82C84A clock generator, the

system can be built with a single crystal providing both the

processor clock and the clock for the 82C52. The 82C52 has

special divider circuitry which is designed to supply industry

standard baud rates with a 2.4576MHz input frequency.

Using a 15MHz crystal as shown, results in less than a 2%

frequency error which is adequate for many applications. For

more precise baud rate requirements, a 14.7456MHz crystal

will drive the 80C86 at 4.9MHz and provide the 82C52 with

the standard baud rate input frequency of 2.4576MHz. If

baud rates above 156Kbaud are desired, the OSC output

can be used instead of the PCLK (

6) output for

asynchronous baud rates up to 1Mbaud.

NOTE: C1 = C2 = 20pF For CL = 20pF

C1 = C2 = 47pF For CL = 32pF

FIGURE 10.

C1 (NOTE)

GND

C2 (NOTE)

82C52

FIGURE 11. 80C86/82C52 INTERFACE

15MHz

CLK

PCLK

OSC

82C84A OR

82C85

INT

INTA

CLK

80C86

80C88

5MHz

INT

IRX

82C59A

SDO

SDI

82C52

CSO

INTA

AD0, AD7

2.5MHz

15MHz

82C88

(MAX MODE)

IORD

IOWR

ADDRESS BUS

CHIP SELECT

SERIAL

DATA

D0-D7

A0, A1

INTR, DR, TBRE

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