4

PS8502

10/10/00

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PI6C2310

PCI-X Clock Buffers

0.8V

2.0V

0.8V

2.0V

Tr

Tf

1.4V

T1

Tp

1.4V

1.4V

Tsk

OUTy

OUTx

1.65V

Tp(n)

Tp(n+1)

1.65V

1.65V

1.65V

Tskp2p

Device1

OUTx

Device2

OUTy

1.65V

1.65V

Tpd

FBIN

CLKIN

Figure 1. Rise/Fall time

Figure 2. Duty cycle

Figure 3. Output skew

Figure 4. Cycle jitter

Figure 5. Pkg.-to-Pkg. skew

Figure 6. Propagation Delay

Figure 7. Test load

15pF

OUTx

DUT