STM32MP157C datasheet(48/258 Pages) STMICROELECTRONICS

48 / 258 page

Functional overview

STM32MP157C

48/258

DS12505 Rev 2

3.35.3

Basic timers TIM6 and TIM7

These timers are mainly used for DAC trigger and waveform generation. They can also be

used as a generic 16-bit time base.

TIM6 and TIM7 support independent DMA request generation.

3.35.4

Low-power timer (LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5)

The low-power timer has an independent clock and is running also in Stop mode if it is

clocked by LSE, LSI or an external clock. It is able to wakeup the device from Stop mode.

These low-power timer supports the following features:

•

16-bit up counter with 16-bit autoreload register

•

16-bit compare register

•

Configurable output: pulse, PWM

•

Continuous / one-shot mode

•

Selectable software / hardware input trigger

•

Selectable clock source:

•

Internal clock source: LSE, LSI, HSI or APB clock

•

External clock source over LPTIM input (working even with no internal clock source

running, used by the pulse counter application)

•

Programmable digital glitch filter

•

Encoder mode

3.35.5

Independent watchdog (IWDG1, IWDG2)

The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is

clocked from an independent 32 kHz internal RC(LSI) and as it operates independently from

the main clock, it can operate in Stop and Standby modes. It can be used either as a

watchdog to reset the device when a problem occurs, or as a free-running timer for

application timeout management. It is hardware- or software-configurable through the option

bytes.

IWDG1 can be defined (in ETZPC) as accessible by secure software only.

3.35.6

System window watchdog (WWDG1)

The window watchdog is based on a 7-bit downcounter that can be set as free-running. It

can be used as a watchdog to reset the device when a problem occurs. It is clocked from

the APB clock. It has an early warning interrupt capability and the counter can be frozen in

debug mode.

3.35.7

SysTick timer (Cortex-M4)

This timer is embedded inside Cortex-M4 core and dedicated to real-time operating

systems, but can also be used as a standard downcounter. It features:

•

A 24-bit downcounter

•

Autoreload capability

•

Maskable system interrupt generation when the counter reaches 0

•

Programmable clock source.

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