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STM32MP157C Datenblatt(PDF) 15 Page - STMicroelectronics |
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STM32MP157C Datenblatt(HTML) 15 Page - STMicroelectronics |
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15 / 258 page ![]() DS12505 Rev 2 15/258 STM32MP157C Description 58 All the devices offer two ADCs, two DACs, a low-power RTC, 12 general-purpose 16-bit timers, two PWM timers for motor control, five low-power timers, a true random number generator (RNG), and a cryptographic acceleration cell. The devices support six digital filters for external sigma delta modulators (DFSDM). They also feature standard and advanced communication interfaces. • Standard peripherals –Six I2Cs – Four USARTs and four UARTs – Six SPIs, three I2Ss full-duplex master/slave. To achieve audio class accuracy, the I2S peripherals can be clocked via a dedicated internal audio PLL or via an external clock to allow synchronization. – Four SAI serial audio interfaces – One SPDIF Rx interface – Management data input/output slave (MDIOS) – Three SDMMC interfaces – An USB high-speed Host with two ports two high-speed PHYs and a USB OTG high-speed with full-speed PHY or high-speed PHY shared with second port of USB Host. – Two FDCAN interface, including one supporting TTCAN mode – A Gigabit Ethernet interface – HDMI-CEC • Advanced peripherals including – A flexible memory control (FMC) interface – A Quad-SPI Flash memory interface – A camera interface for CMOS sensors – An LCD-TFT display controller – A DSI Host interface. Refer to Table 1: STM32MP157C features and peripheral counts for the list of peripherals available on each part number. A comprehensive set of power-saving mode allows the design of low-power applications. The STM32MP157C devices are proposed in 4 packages ranging from 257 to 448 balls with pitch 0.5 mm to 0.8 mm. The set of included peripherals changes with the device chosen. These features make the STM32MP157C suitable for a wide range of consumer, industrial, white goods and medical applications. Figure 1 shows the general block diagram of the device family. |
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