8

Freq

[GHz]

S11

S21

S12

S22

dB

Mag

Phase

dB

Mag

Phase

dB

Mag

Phase

dB

Mag

Phase

83

-16.64

0.15

152.72

6.96

2.23

43.86

-28.93

3.58E-02

143.86

-15.28

0.17

36.42

84

-16.13

0.16

144.48

6.75

2.18

11.94

-28.86

3.61E-02

114.26

-11.71

0.26

20.29

85

-19.10

0.11

166.48

5.98

1.99

-15.86

-29.68

3.28E-02

76.14

-11.91

0.25

11.38

86

-13.97

0.20

134.55

5.16

1.81

-48.54

-31.27

2.73E-02

49.12

-9.97

0.32

-0.26

87

-12.56

0.24

135.11

4.43

1.67

-79.68

-31.35

2.71E-02

10.38

-9.78

0.32

-6.24

88

-11.57

0.26

131.84

4.03

1.59

-115.31

-32.51

2.37E-02

-19.05

-11.31

0.27

-1.38

89

-12.25

0.24

120.86

1.67

1.21

-149.46

-34.59

1.86E-02

-63.31

-8.64

0.37

-2.01

90

-12.49

0.24

126.24

-0.80

0.91

168.79

-35.60

1.66E-02

-93.76

-6.63

0.47

0.98

91

-13.24

0.22

111.67

-3.93

0.64

139.06

-37.67

1.31E-02

-137.97

-4.99

0.56

-3.49

92

-12.60

0.23

116.82

-7.69

0.41

99.48

-42.20

7.76E-03

-120.24

-4.60

0.59

-7.41

93

-15.19

0.17

115.46

-12.24

0.24

70.72

-45.98

5.03E-03

-167.53

-3.23

0.69

-14.77

94

-15.57

0.17

98.36

-15.43

0.17

40.10

-43.49

6.69E-03

148.42

-2.13

0.78

-17.32

95

-15.73

0.16

82.30

-18.17

0.12

15.26

-46.84

4.55E-03

137.70

-2.13

0.78

-29.11

96

-14.37

0.19

97.00

-21.79

0.08

-13.16

-55.96

1.59E-03

153.58

-2.46

0.75

-35.83

97

-12.01

0.25

81.38

-24.88

0.06

-34.33

-48.03

3.97E-03

110.84

-1.60

0.83

-40.19

98

-7.91

0.40

75.00

-27.42

0.04

-66.49

-49.87

3.21E-03

38.33

-0.85

0.91

-52.74

99

-12.46

0.24

65.38

-31.17

0.03

-91.90

-103.00

7.08E-06

92.96

-1.52

0.84

-55.74

100

-11.59

0.26

68.80

-34.78

0.02

-113.10

-71.50

2.66E-04

-26.59

-2.62

0.74

-41.36

Note:

1. Data obtained from an on-wafer condition.

Application and Usage

AMMC-5025 is biased with a single positive drain supply

the recommended bias condition for the AMMC-5025 is

level, Vg1 is typically –1.8V. Typically, DC current flow for

when not utilizing gain control. Minor improvements in

performance are possible depending on the application.

The drain bias voltage range is 3 to 6V and the quiescent

drain current biasing range is 80mA to 120mA.

Input and output RF ports are DC coupled; therefore, DC

decoupling capacitors are required if there are DC paths.

RF bond connections should be kept as short as possible

to reduce RF lead inductance which will degrade perfor-

mance above 20 GHz.

Ground connections are made with plated through-holes

to the backside of the device; therefore, ground wires are

not needed.

Using the simplest form of assembly (Figure 11), the

device is capable of delivering flat gain over a 2-80 GHz

range with a minimum of gain slope and ripple. Figure 11

shows a typical assembly application.

However, this device is designed with DC coupled RF I/O

ports, and operation may be extended to lower frequen-

cies (<2 GHz) through the use of off-chip low-frequency

extension circuitry and proper external biasing compo-

nents. With low frequency bias extension it may be used

in a variety of time-domain applications (through 80

Gb/s).

Refer to the low frequency extension section of Avago

Applications Note 5359 “AMMC-5024 30KHz-40GHz TWA

Operational Guide” for detailed information on use below

2 GHz.

Note:

1. Eutectic attach is not recommended and may jeopardize reliability

of the device.