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© Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 02 — 26 January 2005

3 of 12

Philips Semiconductors

PH4530L

N-channel TrenchMOS™ logic level FET

Fig 1.

Normalized total power dissipation as a

function of mounting base temperature.

Fig 2.

Normalized continuous drain current as a

function of mounting base temperature.

Fig 3.

Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

03aa15

0

40

80

120

0

50

100

150

200

(%)

(

°C)

03aa23

0

40

80

120

0

50

100

150

200

(%)

P

der

P

tot

P

tot 25 C

°

()

-----------------------

100%

×

=

I

der

I

D

I

D25 C

°

()

-------------------

100%

×

=

003aaa525

1

10

10

2

10

3

10

-1

1

10

10

2

(A)

DC

10 ms

1 ms

100 ms

µs

100

µs