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OPA607 Datenblatt(PDF) 15 Page - Texas Instruments

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Teilenummer OPA607
Bauteilbeschribung  OPAx607-Q1, Automotive, 50-MHz , Rail to Rail Output CMOS Operational Amplifier
PDF  35 Pages
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Hersteller  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OPA607 Datenblatt(HTML) 15 Page - Texas Instruments

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8.3 Feature Description
8.3.1 Operating Voltage
The OPAx607-Q1 operational amplifiers are fully specified and assured for operation from 2.2 V to 5.5 V,
applicable from –40°C to +125°C. The OPAx607-Q1 devices are completely operational with asymmetric,
symmetric and single supply voltages applied across the supply pins. The total voltage (that is, (VS+) – (VS–))
must be less than the supply voltage mentioned in Section 7.1.
8.3.2 Rail-to-Rail Output and Driving Capacitive Loads
Designed as a low-power, low-voltage operational amplifier, the OPAx607-Q1 devices are capable of delivering
a robust output drive. For resistive loads of 10 kΩ, the output swings to within a few millivolts of either supply
rail, regardless of the applied power-supply voltage. Different load conditions change the ability of the amplifier to
swing close to the rails. The OPAx607-Q1 devices drive up to a nominal capacitive load of 47 pF on the output
with no special consideration and without the need of a series isolation resistor RISO while still being able to
achieve 45° of phase margin. When driving capacitive loads greater than 47 pF, TI recommends using RISO as
shown in Figure 8-1 in series with the output as close to the device as possible. Refer to Figure 7-18 for looking
up different values of RISO required for CL to achieve 45° phase margin. Without RISO, the external capacitance
(CL) interacts with the output impedance (ZO) of the amplifier, resulting in stability issues. Inserting RISO isolates
CL from ZO and restores the phase margin. Figure 8-1 shows the test circuit.
+
±
VIN
RISO
CL
10 k
VOUT
OPAx607-Q1
IOVERLOAD
10 mA max
Rf
Rg
Cf
Figure 8-1. Input Current Protection and Driving Capacitive Loads
Figure 8-2 and Figure 8-3 show the phase margin achieved with varying RISO with different values of CL.
RISO (:)
0
50
100
150
200
250
300
350
400
450
500
0
10
20
30
40
50
60
70
80
90
100
D018
10pF
22pF
47pF
0.1nF
1nF
10nF
Gain = 10 V/V,
Cf = 2.5 pF,
RL = 10 kΩ
Figure 8-2. Phase Margin vs. Series Isolation
Resistor
RISO (:)
0
50
100
150
200
250
300
350
400
450
500
0
10
20
30
40
50
60
70
80
90
100
D017
10pF
22pF
47pF
0.1nF
1nF
10nF
Gain = 20 V/V,
Cf = 2.5 pF,
RL = 10 kΩ
Figure 8-3. Phase Margin vs. Series Isolation
Resistor
www.ti.com
OPA607-Q1, OPA2607-Q1
SBOSA38A – FEBRUARY 2021 – REVISED APRIL 2021
Copyright © 2021 Texas Instruments Incorporated
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Product Folder Links: OPA607-Q1 OPA2607-Q1



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