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TLV9152SIRUGR Datenblatt(PDF) 10 Page - Texas Instruments |
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TLV9152SIRUGR Datenblatt(HTML) 10 Page - Texas Instruments |
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10 / 76 page ![]() 1 IN1+ 12 IN4+ 2 V+ 11 V– 3 IN2+ 10 IN3+ 4 IN2– 9 IN3– Not to scale Thermal Pad A. Package is preview only. Figure 5-10. TLV9154S RTE Package(A) 16-Pin WQFN With Exposed Thermal Pad Top View Table 5-6. Pin Functions: TLV9154S PIN I/O DESCRIPTION NAME RTE IN1+ 1 I Noninverting input, channel 1 IN1– 16 I Inverting input, channel 1 IN2+ 3 I Noninverting input, channel 2 IN2– 4 I Inverting input, channel 2 IN3+ 10 I Noninverting input, channel 3 IN3– 9 I Inverting input, channel 3 IN4+ 12 I Noninverting input, channel 4 IN4– 13 I Inverting input, channel 4 OUT1 15 O Output, channel 1 OUT2 5 O Output, channel 2 OUT3 8 O Output, channel 3 OUT4 14 O Output, channel 4 SHDN12 6 I Shutdown, channel 1 & 2: low = amplifiers enabled, high = amplifiers disabled. See Shutdown for more information. SHDN34 7 I Shutdown, channel 3 & 4: low = amplifiers enabled, high = amplifiers disabled. See Shutdown for more information. VCC+ 2 — Positive (highest) power supply VCC– 11 — Negative (lowest) power supply TLV9151, TLV9152, TLV9154 SBOS986D – OCTOBER 2019 – REVISED MAY 2021 www.ti.com 10 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TLV9151 TLV9152 TLV9154 |
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