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LP5860 Datenblatt(PDF) 24 Page - Texas Instruments

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Teilenummer LP5860
Bauteilbeschribung  LP5860 11 횞 18 LED Matrix Driver with 8-bit Analog and 8-/16-bit PWM Dimming
PDF  57 Pages
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Hersteller  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LP5860 Datenblatt(HTML) 24 Page - Texas Instruments

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Table 8-7. SPI Data Format
Address
Byte1
Register Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
9th bit
8th bit
7th bit
6th bit
5th bit
4th bit
3th bit
2th bit
Address
Byte2
Register Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1th bit
0th bit
R: 1 W: 0
Don't Care
SCLK
MISO
SS
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
MOSI
High Impedance
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
W
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
Address Byte 1
Address Byte 2
Data Byte 1
Data Byte 2
Figure 8-17. SPI Write Timing
SCLK
MISO
SS
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
MOSI
High Impedance
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
R
Address Byte 1
Address Byte 2
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
Data Byte 1
Data Byte 2
Figure 8-18. SPI Read Timing
Multiple Devices Connection
The device enters into SPI mode if IFS is pulled high to VIO through a pullup resistor(4.7KΩ recommended).
VIO_EN can either be connected with VIO power supply or GPIO. It’s suggested to put one 1nF cap as closer
to VIO_EN pin as possible. In SPI mode host can address as many devices as there are follower select pins on
host.
MOSI
MISO
MCU
VIO_EN
GND
Device 0
SCLK
SS
VIO
VSYNC
MOSI
MISO
VIO_EN
GND
Device N
SCLK
SS
VSYNC
SS 0
SS N
IFS
IFS
VIO
VIO
Figure 8-19. SPI Multiple Devices Connection
8.6 Register Maps
This section provides a summary of the register maps. For detailed register functions and descriptions, please
refer to LP5860 11x18 LED Matrix Driver Register Maps.
LP5860
SNVSBU8 – MAY 2021
www.ti.com
24
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Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: LP5860



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