10

AT25DF256

DS-25DF256–035D–2/2017

While the device is programming, the Status Register can be read and will indicate that the device is busy. For faster

data bytes have finished programming. At some point before the program cycle completes, the WEL bit in the Status

Register will be reset back to the logical “0” state.

The device also incorporates an intelligent programming algorithm that can detect when a byte location fails to program

properly. If a programming error arises, it will be indicated by the EPE bit in the Status Register.

Figure 8-1. Byte Program

Figure 8-2. Page Program

8.2

Page Erase

Page Erase for 256Kbit, 128 Pages [seven (7) page address bits, PA<6:0>] of 256Bytes each.

The Page Erase command can be used to individually erase any page in the main memory array. The Main Memory

Byte/Page Program command can be utilized at a later time.

To perform a Page Erase with the standard page size (256 bytes), an opcode of 81h must be clocked into the device

followed by three address bytes comprised of:

Byte 0: 81h the page erase command code

Byte 1: XXXX XXXX; which is eight (8) dummy bits

Byte 2: X, PA<6:0>; which is one dummy bit X, and seven (7) page address bits PA<6:0>

Byte 3: XXXX XXXX; which is eight (8) dummy bits

SCK

CS

SI

SO

MSB

MSB

23

1

0

00000010

67

5

410 11

9

812

39

37 38

33

36

35

34

31 32

29 30

OPCODE

HIGH-IMPEDANCE

AAAA

AAA

A

A

MSB

DDDDDDD

D

ADDRESS BITS A23-A0

DATA IN

SCK

CS

SI

SO

MSB

MSB

23

1

0

00000010

67

5

49

839

37 38

33

36

35

34

31 32

29 30

OPCODE

HIGH-IMPEDANCE

AA

AAA

A

MSB

DDDDDDD

D

ADDRESS BITS A23-A0

DATA IN BYTE 1

MSB

DDDDDDD

D

DATA IN BYTE n