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P87LPC779 Datenblatt(PDF) 13 Page - NXP Semiconductors

Teilenummer P87LPC779
Bauteilbeschribung  CMOS single-chip 8-bit 80C51 microcontroller with 128-byte data RAM, 8 kB OTP
PDF  74 Pages
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Hersteller  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
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P87LPC779 Datenblatt(HTML) 13 Page - NXP Semiconductors

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Philips Semiconductors
P87LPC779
CMOS single-chip 8-bit microcontroller
Product data
Rev. 02 — 03 May 2004
13 of 74
9397 750 13213
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
the A/D to stabilize. Prior to the beginning of an A/D conversion, one analog input pin
must be selected for conversion via the AADR1 and AADR0 bits. These bits cannot
be changed while the A/D is performing a conversion.
An A/D conversion is started by setting the ADCS bit, which remains set while the
conversion is in progress. When the conversion is complete, the ADCS bit is cleared
and the ADCI bit is set. When ADCI is set, it will generate an interrupt if the interrupt
system is enabled, the A/D interrupt is enabled (via the EAD bit in the IE1 register),
and the A/D interrupt is the highest priority pending interrupt.
When a conversion is complete, the result is contained in the register DAC0 and can
be read to get the ADC result. This value will not change until another conversion is
started. Before another A/D conversion may be started, the ADCI bit must be cleared
by software. The A/D channel selection may be changed by the same instruction that
sets ADCS to start a new conversion, but not by the same instruction that clears
ADCI.
The connections of the A/D converter are shown in Figure 5.
The ideal A/D result may be calculated as follows:
(1)
Table 4:
ADCON - A/D control register (address C0h) bit allocation
Bit addressable; Reset value: 00H
Bit
7
6
5
4
3
2
1
0
Symbol
ENADC
DAC1
DAC0
ADCI
ADCS
RCCLK
AADR1
AADR0
Table 5:
ADCON - A/D control register (address C0h) bit description
Bit
Symbol
Description
7
ENADC
When ENADC = 1, the A/D is enabled and conversions may take
place. Must be set 10 microseconds before a conversion is started.
ENADC cannot be cleared while ADCS or ADCI are ‘1’.
6
DAC1
When ENDAC1 = 1, DAC1 is enabled to provide an analog output
voltage. Refer to Section 8.5 “Digital to Analog Converter (DAC)
outputs” on page 17.
5
DAC0
When ENDAC1 = 0, DAC0 is enabled to provide an analog output
voltage. Writable while ADCS and ADCI are ‘0’. Refer to Section
8.5 “Digital to Analog Converter (DAC) outputs” on page 17 for
more detail. ENADC and ENDAC0 should not be set at the same
time.
Result
V
IN
V
SS
()
256
V
DD
V
SS
-------------------------- round result to the nearest integer
()
×
=



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