MAX1209 datasheet(5/27 Pages) MAXIM

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12-Bit, 80Msps, 3.3V IF-Sampling ADC

_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), VIN = -0.5dBFS, CLKTYP = high, DCE = high, PD = low,

G/T = low, fCLK = 80MHz (50% duty cycle), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Input Resistance

RCLK

Figure 5

Input Capacitance

CCLK

2pF

DIGITAL INPUTS (CLKTYP, G/

T, PD)

Input High Threshold

VIH

0.8 x

OVDD

Input Low Threshold

VIL

0.2 x

OVDD

VIH = OVDD

±5

Input Leakage Current

VIL = 0

±5

µA

Input Capacitance

CDIN

5pF

DIGITAL OUTPUTS (D11–D0, DAV, DOR)

D11–D0, DOR, ISINK = 200µA

0.2

Output Voltage Low

VOL

DAV, ISINK = 600µA

0.2

D11–D0, DOR, ISOURCE = 200µA

OVDD -

0.2

Output Voltage High

VOH

DAV, ISOURCE = 600µA

OVDD -

0.2

Tri-State Leakage Current

ILEAK

(Note 3)

±5

µA

D11–D0, DOR Tri-State Output

Capacitance

COUT

(Note 3)

DAV Tri-State Output

Capacitance

CDAV

(Note 3)

POWER REQUIREMENTS

Analog Supply Voltage

VDD

3.0

3.3

3.6

Digital Output Supply Voltage

OVDD

1.7

2.0

VDD +

0.3V

Normal operating mode,

fIN = 175MHz at -0.5dBFS, CLKTYP = GND,

single-ended clock

111

Normal operating mode,

fIN = 175MHz at -0.5dBFS,

CLKTYP = OVDD, differential clock

119

132

Analog Supply Current

IVDD

Power-down mode clock idle, PD = OVDD

0.001

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