STM32F732IE datasheet(41/226 Pages) STMICROELECTRONICS

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DS11854 Rev 6

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STM32F732xx STM32F733xx

Functional overview

•

Configurable stop bits (1, 1.5, or 2 stop bits)

•

Synchronous mode and clock output for synchronous communications

•

Single-wire half-duplex communications

•

Separate signal polarity control for transmission and reception

•

Swappable Tx/Rx pin configuration

•

Hardware flow control for modem and RS-485 transceiver

•

Multiprocessor communications

•

LIN master synchronous break send capability and LIN slave break detection capability

•

IrDA SIR encoder decoder supporting 3/16 bit duration for normal mode

•

Smartcard mode (T = 0 and T = 1 asynchronous protocols for Smartcards as defined in

the ISO/IEC 7816-3 standard)

•

Support for Modbus communication

Table 8 summarizes the implementation of all U(S)ARTs instances

3.23

Serial peripheral interface (SPI)/inter- integrated sound

interfaces (I2S)

The devices feature up to five SPIs in slave and master modes in full-duplex and simplex

communication modes. SPI1, SPI4, and SPI5 can communicate at up to 50 Mbit/s, SPI2

and SPI3 can communicate at up to 25 Mbit/s. The 3-bit prescaler gives 8 master mode

frequencies and the frame is configurable from 4 to 16 bits. The SPI interfaces support the

NSS pulse mode, TI mode and Hardware CRC calculation. All the SPIs can be served by

the DMA controller.

Table 8. USART implementation

Features(1)

1. X: supported.

USART1/2/3/6

UART4/5/7/8

Data length

7, 8 and 9 bits

Hardware flow control for modem

Continuous communication using DMA

Multiprocessor communication

Synchronous mode

Smartcard mode

Single-wire half-duplex communication

IrDA SIR ENDEC block

LIN mode

Dual clock domain

Receiver timeout interrupt

Modbus communication

Auto baud rate detection

Driver enable

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