STM32WLE4JC datasheet(26/146 Pages) STMICROELECTRONICS

26 / 146 page

Functional overview

STM32WLE5/E4xx

26/146

DS13105 Rev 9

The LDO or SMPS step-down converter operating mode can be configured by one of the

following:

•

by the MCU using the SMPSEN setting in PWR control register 5 (PWR_CR5), that

depends upon the MCU system operating mode (Run, Stop, Standby or Shutdown).

•

by the sub-GHz radio using SetRegulatorMode() command and the sub-GHz radio

operating mode (Sleep, Calibrate, Standby, Standby with HSE32 or Active).

After any POR and NRST reset, the LDO mode is selected. The SMPS selection has priority

over LDO selection.

While the sub-GHz radio is in Standby with HSE32 or in Active mode, the supply mode is

not altered until the sub-GHz radio enters Standby or Sleep mode. The sub-GHz radio

activity may add a delay for entering the MCU software requested supply mode.

The LDO or SMPS supply mode can be checked with the SMPSRDY flag in power status

Note:

When the radio is active, the supply mode is not changed until after the radio activity is

finished.

During Stop 1, Stop 2 and Standby modes, when the sub-GHz radio is not active, the LDO

or SMPS step-down converter is switched off. When exiting low-power modes (except

Shutdown), the SMPS step-down converter is set by hardware to the mode selected by the

SMPSEN bit in PWR control register 5 (PWR_CR5). SMPSEN is retained in Stop and

Standby modes.

Independently from the MCU software selected supply operating mode, the sub-GHz radio

allows the supply mode selection while the sub-GHz radio is active (thanks to the sub-GHz

radio SetRegulatorMode()command).

The maximum load current delivered by the SMPS can be selected by the sub- GHz radio

SUBGHZ_SMPSC2R register.

The inrush current of the LDO and SMPS step-down converter can be controlled via the

sub- GHz radio SUBGHZ_PCR register. This information is retained in all but the sub-GHz

radio Deep-sleep mode.

The SMPS needs a clock to be functional. If for any reason this clock stops, the device may

be destroyed. To avoid this situation, a clock detection is used to, in case of a clock failure,

switch off the SMPS and enable the LDO. The SMPS clock detection is enabled by the

sub-GHz radio SUBGHZ_SMPSC0R.CLKDE. By default, the SMPS clock detection is

disabled and must be enabled before enabling the SMPS.

Danger:

Before enabling the SMPS, the SMPS clock detection must be

enabled in the sub-GHz radio SUBGHZ_SMPSC0R.CLKDE.

3.9.2

Power supply supervisor

The devices integrate a power-on reset/power-down reset, coupled with a Brownout reset

(BOR) circuitry.

BOR0 level cannot be disabled. Other BOR levels can be enabled by user option. When

enabled, BOR is active in all power modes except in Shutdown

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