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STM8AF6213 Datenblatt(PDF) 81 Page - STMicroelectronics

Teilenummer STM8AF6213
Bauteilbeschribung  Automotive 8-bit MCU, with up to 8-Kbyte Flash memory, data EEPROM, 10-bit ADC, timers, LIN, SPI, I²C, 3 to 5.5 V
PDF  112 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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STM8AF6213 Datenblatt(HTML) 81 Page - STMicroelectronics

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DS9884 Rev 9
81/112
STM8AF6213/13A/23/23A/26
Electrical characteristics
108
Figure 35. Recommended reset pin protection
10.3.8
SPI serial peripheral interface
Unless otherwise specified, the parameters given in Table 53 are derived from tests
performed under ambient temperature, fMASTER frequency and VDD supply voltage
conditions. tMASTER = 1/fMASTER.
Refer to I/O port characteristics for more details on the input/output alternate function
characteristics (NSS, SCK, MOSI, MISO).
MSv38371V1
External
reset circuit
(optional)
0.1 μF
NRST
Filter
STM8A
VDD
RPU
Internal reset
Table 53. SPI characteristics
Symbol
Parameter
Conditions(1)
Min
Max
Unit
fSCK
1/tc(SCK)
SPI clock frequency
Master mode
0
8
MHz
Slave mode
0
6
tr(SCK)
tf(SCK)
SPI clock rise and fall time
Capacitive load:
C = 30 pF
-25
ns
tsu(NSS)(2)
NSS setup time
Slave mode
4 * tMASTER
-
th(NSS)(2)
NSS hold time
Slave mode
70
-
tw(SCKH)(2)
tw(SCKL)(2)
SCK high and low time
Master mode
tSCK/2 - 15 tSCK/2 + 15
tsu(MI)(2)
tsu(SI)(2)
Data input setup time
Master mode
5
-
Slave mode
5
-
th(MI)(2)
th(SI)(2)
Data input hold time
Master mode
7
-
Slave mode
10
-
ta(SO)(2)(3) Data output access time
Slave mode
-
3* tMASTER
tdis(SO)(2)(4) Data output disable time
Slave mode
25
-
tv(SO)(2)
Data output valid time
Slave mode
(after enable edge)
-65
tv(MO)(2)
Data output valid time
Master mode
(after enable edge)
-36



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