INA851. The 5-kΩ and 1.25-kΩ resistors used in the output stage are ratiometrically matched to achieve stable

1-V/V and 0.2-V/V gain terms; although, the resistor values may shift up to 15%, depending on production.

Table 8-1. Commonly Used Gains and Resistor Values

DESIRED GAIN

(V/V)

(Ω)

(Ω)

CALCULATED GAIN

(V/V)

CONTRIBUTED GAIN ERROR

(%)

0.2

NC, short OUT+ to G02+

and OUT– to G02–

NC

0.200

N/A

0.5

4 k, short OUT+ to G02+

and OUT– to G02–

4.02 k

0.499

0.30

1

NC

NC

1.000

N/A

2

6 k

5.97 k

2.005

–0.25

5

1.5 k

1.5 k

5.000

0.00

10

666.67

665

10.023

–0.23

20

315.79

316

19.987

0.06

50

122.45

124

49.387

1.23

100

60.61

60.4

100.338

–0.34

200

30.15

30.1

200.336

–0.17

500

12.02

12.1

496.868

0.63

1000

6.01

6.04

994.377

0.56

10000

600 m

604 m

9934.775

0.65

As shown in Figure 8-2 and explained in more detail in Section 11, make sure to connect low-ESR, 0.1-µF

ceramic bypass capacitors between each supply pin and ground, and to place these capacitors as close as

possible to the device pins.

8.3.1.1 Gain Drift

gain accuracy and drift is determined from Equation 1. The best gain drift of 5 ppm/

℃ (maximum) is achieved

output stage is in attenuating gain mode (OUT− shorted to G02− and OUT+ shorted to G02+), both the 1.25-kΩ

and the 5-kΩ resistors contribute mismatch, as do the traces between the G02x and OUTx pins. Only the 5-kΩ

resistors contribute mismatch when the output stage is in unity gain mode (with G02− and G02+ floating).

At input stage gains greater than 1, gain drift increases as a result of the individual drift of the 3-kΩ resistors in

the internal feedback resistors improves the overall temperature stability of applications using input-stage gains

greater than 1 V/V over alternate solutions. The low resistor values required for high gain make wiring resistance

an important consideration. Sockets add to the wiring resistance and contribute additional gain error (such as

a possible unstable gain error) at gains of approximately 20 or greater. To maintain stability, avoid parasitic

pins maintains optimal CMRR over frequency.

INA851

SBOS999 – MARCH 2022

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