PDIP−14

CASE 646−06

ISSUE S

DATE 22 APR 2015

SCALE 1:1

17

14

8

GENERIC

MARKING DIAGRAM*

XXXXX = Specific Device Code

A

= Assembly Location

WL

= Wafer Lot

YY

= Year

WW

= Work Week

G

= Pb−Free Package

XXXXXXXXXXXX

XXXXXXXXXXXX

AWLYYWWG

1

STYLES ON PAGE 2

1

14

*This information is generic. Please refer to

device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “ G”,

may or may not be present.

b2

NOTE 8

D

A

TOP VIEW

E1

B

b

L

A1

A

C

SEATING

PLANE

0.010

CA

SIDE VIEW

M

14X

D1

e

A2

NOTE 3

M

B M

eB

E

END VIEW

END VIEW

WITH LEADS CONSTRAINED

DIM

MIN

MAX

INCHES

A

−−−−

0.210

A1

0.015

−−−−

b

0.014

0.022

C

0.008

0.014

D

0.735

0.775

D1

0.005

−−−−

e

0.100 BSC

E

0.300

0.325

M

−−−−

10

−−−

5.33

0.38

−−−

0.35

0.56

0.20

0.36

18.67

19.69

0.13

−−−

2.54 BSC

7.62

8.26

−−−

10

MIN

MAX

MILLIMETERS

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: INCHES.

3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACK-

AGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.

4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH

OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE

NOT TO EXCEED 0.10 INCH.

5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM

PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR

TO DATUM C.

6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE

LEADS UNCONSTRAINED.

7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE

LEADS, WHERE THE LEADS EXIT THE BODY.

8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE

CORNERS).

E1

0.240

0.280

6.10

7.11

b2

eB

−−−−

0.430

−−−

10.92

0.060 TYP

1.52 TYP

c

A2

0.115

0.195

2.92

4.95

L

0.115

0.150

2.92

3.81

°

°

H

NOTE 5

NOTE 6

M

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

ON Semiconductor and

are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically

disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the

rights of others.

98ASB42428B

DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

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