WM8770 datasheet(11/52 Pages) WOLFSON

11 / 52 page

Production Data

WM8770

PD Rev 4.1 June 2005

DIGITAL AUDIO INTERFACE – SLAVE MODE

Figure 4 Audio Interface – Slave Mode

BCLK

DACLRC/

ADCLRC

BCH

BCL

BCY

DIN1/2/3/4

DOUT

LRSU

LRH

Figure 5 Digital Audio Data Timing – Slave Mode

Test Conditions

AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, TA = +25

oC, fs = 48kHz, MCLK = 256fs, ADC/DAC in Slave Mode unless

otherwise stated.

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Audio Data Input Timing Information

BCLK cycle time

tBCY

BCLK pulse width high

tBCH

BCLK pulse width low

tBCL

DACLRC/ADCLRC set-up

time to BCLK rising edge

tLRSU

DACLRC/ADCLRC hold

time from BCLK rising edge

tLRH

DIN1/2/3/4 set-up time to

BCLK rising edge

tDS

DIN1/2/3/4 hold time from

BCLK rising edge

tDH

DOUT propagation delay

from BCLK falling edge

tDD

Table 3 Digital Audio Data Timing – Slave Mode

Note: ADCLRC and DACLRC should be synchronous with MCLK, although the WM8770 interface is tolerant of phase

variations or jitter on these signals.

BCLK

DOUT

ADCLRC

DIN1/2/3/4

DACLRC

WM8770

CODEC

DSP

ENCODER/

DECODER

WM8770 Datenblatt(PDF) 11 Page - Wolfson Microelectronics plc

WM8770 Datenblatt(HTML) 11 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

Datenblatt Download

Link URL