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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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WM8770 Datenblatt(PDF) 33 Page - Wolfson Microelectronics plc |
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WM8770 Datenblatt(HTML) 33 Page - Wolfson Microelectronics plc |
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33 / 52 page  Production Data WM8770 w PD Rev 4.1 June 2005 33 DAC ANALOGUE OUTPUT ATTENUATION Register bits L1A and R1A control the left and right channel attenuation of DAC 1. Register bits L2A and R2A control the left and right channel attenuation of DAC 2. Register bits L3A and R3A control the left and right channel attenuation of DAC 3. Register bits L4A and R4A control the left and right channel attenuation of DAC 4. Register bits MASTA can be used to control attenuation of all channels. Table 8 shows how the attenuation levels are selected from the 7-bit words. L/RA x[6:0] ATTENUATION LEVEL 00(hex) - ∞dB (mute) : : 1A(hex) - ∞dB (mute) 1B(hex) -100dB : : 7D(hex) -2dB 7E(hex) -1dB 7F(hex) 0dB Table 11 Analogue Volume Control Attenuation Levels DAC DIGITAL VOLUME CONTROL The DAC volume may also be adjusted in the digital domain using independent digtal attenuation control registers REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 7:0 LDA1[7:0] 11111111 (0dB) Digital Attenuation data for Left channel DACL1 in 0.5dB steps. See Table 12 01001 Digital Attenuation DACL1 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0: Store LDA1 in intermediate latch (no change to output) 1: Store LDA1 and update attenuation on all channels 7:0 RDA1[6:0] 11111111 (0dB) Digital Attenuation data for Right channel DACR1 in 0.5dB steps. See Table 12 01010 Digital Attenuation DACR1 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0: Store RDA1 in intermediate latch (no change to output) 1: Store RDA1 and update attenuation on all channels. 7:0 LDA2[7:0] 11111111 (0dB) Digital Attenuation data for Left channel DACL2 in 0.5dB steps. See Table 12 01011 Digital Attenuation DACL2 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0: Store LDA2 in intermediate latch (no change to output) 1: Store LDA2 and update attenuation on all channels. 7:0 RDA2[7:0] 11111111 (0dB) Digital Attenuation data for Right channel DACR2 in 0.5dB steps. See Table 12 01100 Digital Attenuation DACR2 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0: Store RDA2 in intermediate latch (no change to output) 1: Store RDA2 and update attenuation on all channels. 7:0 LDA3[7:0] 11111111 (0dB) Digital Attenuation data for Left channel DACL3 in 0.5dB steps. See Table 12 01101 Digital Attenuation DACL3 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0: Store LDA3 in intermediate latch (no change to output) 1: Store LDA3 and update attenuation on all channels. 7:0 RDA3[7:0] 11111111 (0dB) Digital Attenuation data for Right channel DACR3 in 0.5dB steps. See Table 12 01110 Digital Attenuation DACR3 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0: Store RDA3 in intermediate latch (no change to output) 1: Store RDA3 and update attenuation on all channels. |
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