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M25PE80-VMP6TP Datenblatt(PDF) 41 Page - STMicroelectronics |
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M25PE80-VMP6TP Datenblatt(HTML) 41 Page - STMicroelectronics |
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41 / 61 page ![]() M25PE80 Instructions 41/61 6.15 Bulk Erase (BE) The Bulk Erase (BE) instruction sets all bits to 1 (FFh). Before it can be accepted, a Write Enable (WREN) instruction must previously have been executed. After the Write Enable (WREN) instruction has been decoded, the device sets the Write Enable Latch (WEL). The Bulk Erase (BE) instruction is entered by driving Chip Select (S) Low, followed by the instruction code on Serial Data Input (D). Chip Select (S) must be driven Low for the entire duration of the sequence. The instruction sequence is shown in Figure 21. Chip Select (S) must be driven High after the eighth bit of the instruction code has been latched in, otherwise the Bulk Erase instruction is not executed. As soon as Chip Select (S) is driven High, the self-timed Bulk Erase cycle (whose duration is tBE) is initiated. While the Bulk Erase cycle is in progress, the Status Register may be read to check the value of the Write In Progress (WIP) bit. The Write In Progress (WIP) bit is 1 during the self-timed Bulk Erase cycle, and is 0 when it is completed. At some unspecified time before the cycle is completed, the Write Enable Latch (WEL) bit is reset. Any Bulk Erase (BE) instruction, while an Erase, Program or Write cycle is in progress, is rejected without having any effects on the cycle that is in progress. A Bulk Erase (BE) instruction is ignored if at least one sector or subsector is write-protected (Hardware or Software protection). If Reset (Reset) is driven Low while a Bulk Erase (BE) cycle is in progress, the Bulk Erase cycle is interrupted and data may not be erased correctly (see Table 15: Device status after a Reset Low pulse). On Reset going Low, the device enters the Reset mode and a time of tRHSL is then required before the device can be re-selected by driving Chip Select (S) Low. For the value of tRHSL see Table 24: Timings after a Reset Low pulse in Section 11: DC and AC parameters. Figure 21. bulk erase (be) Instruction Sequence C D AI03752D S 2 1 34567 0 Instruction |
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